llvm - http://llvm.org

Age	Commit message (Expand)	Author
2013-03-28	Add the X86 FMAs to the scheduling model.	Nadav Rotem
2013-03-28	Add the Haswell machine model.	Nadav Rotem
2013-03-26	Enable SandyBridgeModel for all modern Intel P6 descendants.	Jakob Stoklund Olesen
2013-03-25	Remove IIC_DEFAULT from X86Schedule.td	Jakob Stoklund Olesen
2013-03-21	Add a WriteMicrocoded for ancient microcoded instructions.	Jakob Stoklund Olesen
2013-03-20	Add a catch-all WriteSystem SchedWrite type.	Jakob Stoklund Olesen
2013-03-19	Annotate X86InstrCompiler.td with SchedRW lists.	Jakob Stoklund Olesen
2013-03-16	Define more SchedWrites for annotating X86 instructions.	Jakob Stoklund Olesen
2013-03-14	Prepare for adding InstrSchedModel annotations to X86 instructions.	Jakob Stoklund Olesen
2013-01-09	MIsched: add an ILP window property to machine model.	Andrew Trick
2012-07-07	I'm introducing a new machine model to simultaneously allow simple	Andrew Trick
2012-06-05	X86 itinerary properties.	Andrew Trick
2012-06-05	whitespace	Andrew Trick
2012-05-11	Added X86 Atom latencies to X86InstrMMX.td.	Preston Gurd
2012-05-10	Added X86 Atom latencies for instructions in X86InstrInfo.td.	Preston Gurd
2012-05-04	Adds Intel Atom scheduling latencies to X86InstrSystem.td.	Preston Gurd
2012-05-02	This patch continues the work of adding instruction latencies for X86 Atom,	Preston Gurd
2012-03-19	This patch adds X86 instruction itineraries for non-pseudo opcodes in	Preston Gurd
2012-02-29	Intel Atom instruction itineraries for mov sign extension and mov zero extens...	Andrew Trick
2012-02-27	This patch adds instruction latencies for the SSE instructions	Preston Gurd
2012-02-18	Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,...	Jia Liu
2012-02-01	Instruction scheduling itinerary for Intel Atom.	Andrew Trick