| Age | Commit message (Expand) | Author |
|---|
| 2011-05-17 | Clean up the mess created by r131467+r131469. | Eli Friedman |
| 2011-05-17 | Revert 131467 due to buildbot complaint. | Stuart Hastings |
| 2011-05-17 | Fix an obscure issue in X86_64 parameter passing: if a tiny byval is | Stuart Hastings |
| 2011-05-11 | Add custom lowering of X86 vector SRA/SRL/SHL when the shift amount is a spla... | Nadav Rotem |
| 2011-05-06 | Make the logic for determining function alignment more explicit. No function... | Eli Friedman |
| 2011-03-21 | Re-apply r127953 with fixes: eliminate empty return block if it has no predec... | Evan Cheng |
| 2011-03-19 | Revert r127953, "SimplifyCFG has stopped duplicating returns into predecessors | Daniel Dunbar |
| 2011-03-19 | SimplifyCFG has stopped duplicating returns into predecessors to canonicalize IR | Evan Cheng |
| 2011-03-17 | Move more logic into getTypeForExtArgOrReturn. | Cameron Zwarich |
| 2011-03-17 | Rename getTypeForExtendedInteger() to getTypeForExtArgOrReturn(). | Cameron Zwarich |
| 2011-03-16 | The x86-64 ABI says that a bool is only guaranteed to be sign-extended to a byte | Cameron Zwarich |
| 2011-03-07 | Move getRegPressureLimit() from TargetLoweringInfo to TargetRegisterInfo. | Cameron Zwarich |
| 2011-02-25 | Allow targets to specify a the type of the RHS of a shift parameterized on th... | Owen Anderson |
| 2011-02-22 | [AVX] General VUNPCKL codegen support. | David Greene |
| 2011-02-04 | [AVX] Support VSINSERTF128 with more patterns and appropriate | David Greene |
| 2011-02-03 | [AVX] VEXTRACTF128 support. This commit includes patterns for | David Greene |
| 2011-01-26 | [AVX] Add INSERT_SUBVECTOR and support it on x86. This provides a | David Greene |
| 2011-01-26 | [AVX] Support EXTRACT_SUBVECTOR on x86. This provides a default | David Greene |
| 2010-12-20 | Implement feedback from Bruno on making pblendvb an x86-specific ISD node in ... | Nate Begeman |
| 2010-12-20 | Change the X86 backend to stop using the evil ADDC/ADDE/SUBC/SUBE nodes (which | Chris Lattner |
| 2010-12-19 | improve the setcc -> setcc_carry optimization to happen more | Chris Lattner |
| 2010-12-17 | Add support for matching psign & plendvb to the x86 target | Nate Begeman |
| 2010-12-05 | it turns out that when ".with.overflow" intrinsics were added to the X86 | Chris Lattner |
| 2010-11-30 | Enable sibling call optimization of libcalls which are expanded during | Evan Cheng |
| 2010-11-30 | Fix some cleanups from my last patch. | Eric Christopher |
| 2010-11-30 | Rewrite mwait and monitor support and custom lower arguments. | Eric Christopher |
| 2010-11-27 | Lower TLS_addr32 and TLS_addr64. | Rafael Espindola |
| 2010-11-23 | Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept. | Wesley Peck |
| 2010-11-20 | On X86, MEMBARRIER, MFENCE, SFENCE, LFENCE are not target memory intrinsics, | Duncan Sands |
| 2010-11-14 | move the pic base symbol stuff up to MachineFunction | Chris Lattner |
| 2010-11-14 | simplify getPICBaseSymbol a bit. | Chris Lattner |
| 2010-10-31 | Factorize the duplicated logic for choosing the right argument | Duncan Sands |
| 2010-10-29 | Inline asm multiple alternative constraints development phase 2 - improved ba... | John Thompson |
| 2010-10-21 | X86: Add alloca probing to dynamic alloca on Windows. Fixes PR8424. | Michael J. Spencer |
| 2010-10-20 | Fix Whitespace. | Michael J. Spencer |
| 2010-10-12 | Initial va_arg support for x86-64. Patch by David Meyer! | Dan Gohman |
| 2010-09-30 | Massive rewrite of MMX: | Dale Johannesen |
| 2010-09-22 | reimplement elf TLS support in terms of addressing modes, eliminating Segment... | Chris Lattner |
| 2010-09-22 | convert the last 4 X86ISD nodes that should have memoperands to have them. | Chris Lattner |
| 2010-09-22 | give X86ISD::FNSTCW16m a memoperand, since it touches memory. It only | Chris Lattner |
| 2010-09-22 | give FP_TO_INT16_IN_MEM and friends a memoperand. They are only | Chris Lattner |
| 2010-09-22 | give VZEXT_LOAD a memory operand, it now works with segment registers. | Chris Lattner |
| 2010-09-21 | give LCMPXCHG_DAG[8] a memory operand, allowing it to work with addrspace 256... | Chris Lattner |
| 2010-09-21 | Reimplement r114460 in target-independent DAGCombine rather than target-depen... | Owen Anderson |
| 2010-09-13 | Added skeleton for inline asm multiple alternative constraint support. | John Thompson |
| 2010-09-01 | Use movlps, movlpd, movss and movsd specific nodes instead of pattern matchin... | Bruno Cardoso Lopes |
| 2010-08-31 | Use MOVLHPS and MOVHLPS x86 nodes whenever possible. Also remove some useless... | Bruno Cardoso Lopes |
| 2010-08-21 | Prepare LowerVECTOR_SHUFFLEv8i16 to use x86 target specific nodes directly | Bruno Cardoso Lopes |
| 2010-08-20 | This is the first step towards refactoring the x86 vector shuffle code. The | Bruno Cardoso Lopes |
| 2010-08-10 | Add AVX matching patterns to Packed Bit Test intrinsics. | Bruno Cardoso Lopes |
