| Age | Commit message (Expand) | Author |
|---|
| 2012-05-31 | X86: Rename the CLMUL target feature to PCLMUL. | Benjamin Kramer |
| 2012-05-01 | Make XOP and FMA4 require SSE4A to match GCC behavior. Use this to simplify B... | Craig Topper |
| 2012-05-01 | Make XOP imply AVX as its needed to legalize the registers types. | Craig Topper |
| 2012-05-01 | Make CLMUL and AES imply SSE2 since its needed to legalize the type. | Craig Topper |
| 2012-05-01 | Enable AVX and FMA4 for AMD Bulldozer processors. | Craig Topper |
| 2012-04-26 | Enable detection of AVX and AVX2 support through CPUID. Add AVX/AVX2 to corei... | Craig Topper |
| 2012-02-18 | Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,... | Jia Liu |
| 2012-02-07 | Use LEA to adjust stack ptr for Atom. Patch by Andy Zhang. | Evan Cheng |
| 2012-02-01 | Instruction scheduling itinerary for Intel Atom. | Andrew Trick |
| 2012-01-12 | Rename X86ATTAsmParser -> X86AsmParser | Devang Patel |
| 2012-01-10 | Add definition for intel asm variant. | Devang Patel |
| 2012-01-10 | Add definitions for AMD's bobcat (aka btver1) | Benjamin Kramer |
| 2012-01-09 | Split AsmParser into two components - AsmParser and AsmParserVariant | Devang Patel |
| 2012-01-09 | Remove AVX hack in X86Subtarget. AVX/AVX2 are now treated as an SSE level. Pr... | Craig Topper |
| 2011-12-30 | Make FMA4 imply AVX so that YMM registers would be available. Necessitates re... | Craig Topper |
| 2011-12-29 | Make FMA3 imply AVX needs to be enabled. Particularly because 256-bit types a... | Craig Topper |
| 2011-12-29 | Add FeaturePOPCNT to all CPU types that lost it was removed from SSE42/SSE4A ... | Craig Topper |
| 2011-12-29 | Make SSE42 and SSE4A not imply POPCNT. POPCNT should be able to be disabled o... | Craig Topper |
| 2011-12-02 | Add XOP feature flag. | Jan Sjödin |
| 2011-11-30 | X86: Turns out bulldozer also supports sse42 and lzcnt. | Benjamin Kramer |
| 2011-11-30 | X86: Add subtargets for AMD's bulldozer. | Benjamin Kramer |
| 2011-10-30 | Add intrinsics and feature flag for read/write FS/GS base instructions. Also ... | Craig Topper |
| 2011-10-18 | Remove NaClMode | David Meyer |
| 2011-10-16 | Add X86 BZHI instruction as well as BMI2 feature detection. | Craig Topper |
| 2011-10-14 | Add X86 TZCNT instruction and patterns to select it. Also added core-avx2 pro... | Craig Topper |
| 2011-10-13 | Revert r141854 because it was causing failures: | Bill Wendling |
| 2011-10-13 | Add X86 TZCNT instruction and patterns to select it. Also added core-avx2 pro... | Craig Topper |
| 2011-10-11 | Add X86 LZCNT instruction. Including instruction selection support. | Craig Topper |
| 2011-10-10 | X86: Add a subtarget definition for core-avx-i, which is GCC's name for ivy b... | Benjamin Kramer |
| 2011-10-10 | X86: Add patterns for the movbe instruction (mov + bswap, only available on a... | Benjamin Kramer |
| 2011-10-09 | Add Ivy Bridge 16-bit floating point conversion instructions for the X86 disa... | Craig Topper |
| 2011-10-03 | Add support for MOVBE and RDRAND instructions for the assembler and disassemb... | Craig Topper |
| 2011-09-05 | Add a new MC bit for NaCl (Native Client) mode. NaCl requires that certain | Nick Lewycky |
| 2011-08-26 | Add support for generating CMPXCHG16B on x86-64 for the cmpxchg IR instruction. | Eli Friedman |
| 2011-07-07 | Add Mode64Bit feature and sink it down to MC layer. | Evan Cheng |
| 2011-05-20 | Rename the "sandybridge" subtarget to "corei7-avx", for GCC compatibility. | Benjamin Kramer |
| 2011-05-03 | Add pentium{3,4}m cpus. Patch by Alexander Best! | Michael J. Spencer |
| 2011-04-15 | Fix a ton of comment typos found by codespell. Patch by | Chris Lattner |
| 2011-04-15 | Add 3DNow! intrinsics. | Michael J. Spencer |
| 2011-04-14 | Fix whitespace and tabs. | Michael J. Spencer |
| 2010-12-13 | Disable auto-detection of AVX support since AVX codegen support is not ready. | Evan Cheng |
| 2010-12-10 | Formalize the notion that AVX and SSE are non-overlapping extensions from the... | Nate Begeman |
| 2010-12-04 | Add patterns for the x86 popcnt instruction. | Benjamin Kramer |
| 2010-10-30 | Clean up comments. | Jim Grosbach |
| 2010-09-30 | Clean up asm writer usage for x86 and msp430 to flag that the writer should | Jim Grosbach |
| 2010-08-12 | tblgen/AsmMatcher: Always emit the match function as 'MatchInstructionImpl', | Daniel Dunbar |
| 2010-07-23 | Declare CLMUL as a subtarget feature | Bruno Cardoso Lopes |
| 2010-07-19 | MC/X86: We now match instructions like "incl %eax" correctly for the arch we are | Daniel Dunbar |
| 2010-05-04 | MC/X86: Add "support" for matching ATT style mnemonic prefixes. | Daniel Dunbar |
| 2010-04-05 | Replace TSFlagsFields and TSFlagsShifts with a simpler TSFlags field. | Jakob Stoklund Olesen |
