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path: root/lib/Target/X86/X86.td
AgeCommit message (Expand)Author
2013-03-28Add support of RDSEED defined in AVX2 extensionMichael Liao
2013-03-28Add the Haswell machine model.Nadav Rotem
2013-03-27For the current Atom processor, the fastest way to handle a callPreston Gurd
2013-03-26Add HLE target featureMichael Liao
2013-03-26Enable SandyBridgeModel for all modern Intel P6 descendants.Jakob Stoklund Olesen
2013-03-26Add PREFETCHW codegen supportMichael Liao
2013-02-14added basic support for Intel ADX instructionsKay Tiong Khoo
2013-01-08Pad Short Functions for Intel AtomPreston Gurd
2013-01-05Revert revision 171524. Original message:Nadav Rotem
2013-01-04The current Intel Atom microarchitecture has a feature whereby when a functionPreston Gurd
2012-12-15Make '-mtune=x86_64' assume fast unaligned memory accesses.Chandler Carruth
2012-12-10Revert "Make '-mtune=x86_64' assume fast unaligned memory accesses."Chandler Carruth
2012-12-10Make '-mtune=x86_64' assume fast unaligned memory accesses.Chandler Carruth
2012-12-10Address a FIXME and update the fast unaligned memory feature for newerChandler Carruth
2012-11-08Add support of RTM from TSX extensionMichael Liao
2012-10-25Atom has SIMD instruction set extension up to SSSE3Michael Liao
2012-10-03Fix 80-column violationCraig Topper
2012-09-12Add support for AMD Geode.Roman Divacky
2012-09-04Generic Bypass Slow DivPreston Gurd
2012-08-16Patch to enable FMA on bdver2 target. Make XOP feature enable FMA4 as well.Anitha Boyapati
2012-08-16git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162010 91177308-0d34...Anitha Boyapati
2012-07-07I'm introducing a new machine model to simultaneously allow simpleAndrew Trick
2012-06-03Rename FMA3 feature flag to just FMA to match gcc so it can be added to clang.Craig Topper
2012-05-31X86: Rename the CLMUL target feature to PCLMUL.Benjamin Kramer
2012-05-01Make XOP and FMA4 require SSE4A to match GCC behavior. Use this to simplify B...Craig Topper
2012-05-01Make XOP imply AVX as its needed to legalize the registers types.Craig Topper
2012-05-01Make CLMUL and AES imply SSE2 since its needed to legalize the type.Craig Topper
2012-05-01Enable AVX and FMA4 for AMD Bulldozer processors.Craig Topper
2012-04-26Enable detection of AVX and AVX2 support through CPUID. Add AVX/AVX2 to corei...Craig Topper
2012-02-18Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,...Jia Liu
2012-02-07Use LEA to adjust stack ptr for Atom. Patch by Andy Zhang.Evan Cheng
2012-02-01Instruction scheduling itinerary for Intel Atom.Andrew Trick
2012-01-12Rename X86ATTAsmParser -> X86AsmParserDevang Patel
2012-01-10Add definition for intel asm variant.Devang Patel
2012-01-10Add definitions for AMD's bobcat (aka btver1)Benjamin Kramer
2012-01-09Split AsmParser into two components - AsmParser and AsmParserVariantDevang Patel
2012-01-09Remove AVX hack in X86Subtarget. AVX/AVX2 are now treated as an SSE level. Pr...Craig Topper
2011-12-30Make FMA4 imply AVX so that YMM registers would be available. Necessitates re...Craig Topper
2011-12-29Make FMA3 imply AVX needs to be enabled. Particularly because 256-bit types a...Craig Topper
2011-12-29Add FeaturePOPCNT to all CPU types that lost it was removed from SSE42/SSE4A ...Craig Topper
2011-12-29Make SSE42 and SSE4A not imply POPCNT. POPCNT should be able to be disabled o...Craig Topper
2011-12-02Add XOP feature flag.Jan Sjödin
2011-11-30X86: Turns out bulldozer also supports sse42 and lzcnt.Benjamin Kramer
2011-11-30X86: Add subtargets for AMD's bulldozer.Benjamin Kramer
2011-10-30Add intrinsics and feature flag for read/write FS/GS base instructions. Also ...Craig Topper
2011-10-18Remove NaClModeDavid Meyer
2011-10-16Add X86 BZHI instruction as well as BMI2 feature detection.Craig Topper
2011-10-14Add X86 TZCNT instruction and patterns to select it. Also added core-avx2 pro...Craig Topper
2011-10-13Revert r141854 because it was causing failures:Bill Wendling
2011-10-13Add X86 TZCNT instruction and patterns to select it. Also added core-avx2 pro...Craig Topper
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