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2010-07-06Fix a bunch of custom-inserter functions to handle the case whereDan Gohman
the pseudo instruction is not at the end of the block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107655 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-03Remove isSS argument from CreateFixedObject. Fixed objects cannot be spill ↵Evan Cheng
slots so it's always false. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107550 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-21Remove isTwoAddress from Sparc.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106466 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18Eliminate unnecessary uses of getZExtValue().Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106279 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-17Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). ThisStuart Hastings
addresses a longstanding deficiency noted in many FIXMEs scattered across all the targets. This effectively moves the problem up one level, replacing eleven FIXMEs in the targets with eight FIXMEs in CodeGen, plus one path through FastISel where we actually supply a DebugLoc, fixing Radar 7421831. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106243 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-02cleanupRafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105322 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26Replace the SubRegSet tablegen class with a less error-prone mechanism.Jakob Stoklund Olesen
A Register with subregisters must also provide SubRegIndices for adressing the subregisters. TableGen automatically inherits indices for sub-subregisters to minimize typing. CompositeIndices may be specified for the weirder cases such as the XMM sub_sd index that returns the same register, and ARM NEON Q registers where both D subregs have ssub_0 and ssub_1 sub-subregs. It is now required that all subregisters are named by an index, and a future patch will also require inherited subregisters to be named. This is necessary to allow composite subregister indices to be reduced to a single index. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104704 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26Revert "Replace the SubRegSet tablegen class with a less error-prone mechanism."Jakob Stoklund Olesen
This reverts commit 104654. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104660 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26Replace the SubRegSet tablegen class with a less error-prone mechanism.Jakob Stoklund Olesen
A Register with subregisters must also provide SubRegIndices for adressing the subregisters. TableGen automatically inherits indices for sub-subregisters to minimize typing. CompositeIndices may be specified for the weirder cases such as the XMM sub_sd index that returns the same register, and ARM NEON Q registers where both D subregs have ssub_0 and ssub_1 sub-subregs. It is now required that all subregisters are named by an index, and a future patch will also require inherited subregisters to be named. This is necessary to allow composite subregister indices to be reduced to a single index. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104654 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-11Implement a bunch more TargetSelectionDAGInfo infrastructure.Dan Gohman
Move EmitTargetCodeForMemcpy, EmitTargetCodeForMemset, and EmitTargetCodeForMemmove out of TargetLowering and into SelectionDAGInfo to exercise this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103481 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-06Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that itDan Gohman
doesn't have to guess. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103194 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-06Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103193 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-01Get rid of the EdgeMapping map. Instead, just check for BasicBlockDan Gohman
changes before doing phi lowering for switches. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102809 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-19Delete an unnecessary reference to SelectionDAGISel::BB.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101824 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-17Use const qualifiers with TargetLowering. This eliminates severalDan Gohman
const_casts, and it reinforces the design of the Target classes being immutable. SelectionDAGISel::IsLegalToFold is now a static member function, because PIC16 uses it in an unconventional way. There is more room for API cleanup here. And PIC16's AsmPrinter no longer uses TargetLowering. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101635 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-17Move per-function state out of TargetLowering subclasses and intoDan Gohman
MachineFunctionInfo subclasses. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101634 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-16Add skeleton target-specific SelectionDAGInfo files.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101564 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-15Add const qualifiers to CodeGen's use of LLVM IR constructs.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101334 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-07add newlines at end of files.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100706 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-05Replace TSFlagsFields and TSFlagsShifts with a simpler TSFlags field.Jakob Stoklund Olesen
When a target instruction wants to set target-specific flags, it should simply set bits in the TSFlags bit vector defined in the Instruction TableGen class. This works well because TableGen resolves member references late: class I : Instruction { AddrMode AM = AddrModeNone; let TSFlags{3-0} = AM.Value; } let AM = AddrMode4 in def ADD : I; TSFlags gets the expected bits from AddrMode4 in this example. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100384 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-04eliminate the magic AbsoluteDebugSectionOffsets MAI hook,Chris Lattner
which is really a property of the section being referenced. Add a predicate to MCSection to replace it. Yay for reduction in magic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100367 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-04Momentous day: remove the "O" member from AsmPrinter. Now all Chris Lattner
"asm printering" happens through MCStreamer. This also Streamerizes PIC16 debug info, which escaped my attention. This removes a leak from LLVMTargetMachine of the 'legacy' output stream. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100327 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-04convert the non-MCInstPrinter'ized EmitInstruction Chris Lattner
implementations to use EmitRawText instead of writing directly to "O". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100318 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-04fix PrintAsmOperand and PrintAsmMemoryOperand to pass down Chris Lattner
raw_ostream to print to. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100313 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-04change a ton of code to not implicitly use the "O" raw_ostreamChris Lattner
member of AsmPrinter. Instead, pass it in explicitly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100306 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-02use DebugLoc default ctor instead of DebugLoc::getUnknownLoc()Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100214 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-18tidy upChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98901 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-13eliminate the now-unneeded context argument of MBB::getSymbol()Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98451 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-13rearrange MCContext ownership. Before LLVMTargetMachine created it Chris Lattner
and passing off ownership to AsmPrinter. Now MachineModuleInfo creates it and owns it by value. This allows us to use MCSymbols more consistently throughout the rest of the code generator, and simplifies a bit of code. This also allows MachineFunction to keep an MCContext reference handy, and cleans up the TargetRegistry interfaces for AsmPrinters. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98450 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-12Fix LLVM build when the user specifies CPPFLAGS on the make command line.Jeffrey Yasskin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98394 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-12inline GetGlobalValueSymbol into the rest its callers andChris Lattner
remove it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98390 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-09Change the Value argument to eliminateFrameIndex to a type-tagged value. ThisJim Grosbach
is preparatory to having PEI's scavenged frame index value reuse logic properly distinguish types of frame values (e.g., whether the value is stack-pointer relative or frame-pointer relative). No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98086 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-06clean this up.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97870 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02Sink InstructionSelect() out of each target into SDISel, and rename itChris Lattner
DoInstructionSelection. Inline "SelectRoot" into it from DAGISelHeader. Sink some other stuff out of DAGISelHeader into SDISel. Eliminate the various 'Indent' stuff from various targets, which dates to when isel was recursive. 17 files changed, 114 insertions(+), 430 deletions(-) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97555 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-01Add explicit keywords.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97460 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-01Add JIT support to the TODO list (test commit)Nathan Keynes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97443 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-17"Fix and issue in SparcAsmPrinter where multiple identical .LLGETPCHn ↵Chris Lattner
symbols could be emitted in the same file (it was uniqued by block number, but not by function number). " Patch by Nathan Keynes! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96495 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-17move isOnlyReachableByFallthrough out of MachineBasicBlock into AsmPrinter,Chris Lattner
and add a sparc implementation that knows about delay slots. Patch by Nathan Keynes! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96492 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-15Move TLOF implementations to libCodegen to resolve layering violation.Anton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96288 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-15Remove an assumption of default arguments. This is in anticipation of aDavid Greene
change to SelectionDAG build APIs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96237 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-10print all the newlines at the end of instructions withChris Lattner
OutStreamer.AddBlankLine instead of textually. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95734 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-04add support for the sparcv9-*-* target triple to turn onChris Lattner
64-bit sparc codegen. Patch by Nathan Keynes! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95293 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-03rejigger the world so that EmitInstruction prints the \n atChris Lattner
the end of the instruction instead of expecting the caller to do it. This currently causes the asm-verbose instruction comments to be on the next line. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95178 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02Revert 95130.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95160 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02refactor code so that LLVMTargetMachine creates the asmstreamer and Chris Lattner
mccontext instead of having AsmPrinter do it. This allows other types of MCStreamer's to be passed in. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95155 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02Pass callsite return type to TargetLowering::LowerCall and use that to check ↵Evan Cheng
sibcall eligibility. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95130 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-28Switch MSP430, SPU, Sparc, and SystemZ to use EmitFunctionBody().Chris Lattner
Diffstat: 6 files changed, 30 insertions(+), 284 deletions(-) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94727 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-27use existing basic block numbers instead of recomputing Chris Lattner
a new set of them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94631 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-27Switch MSP430, CellSPU, SystemZ, Darwin/PPC, Alpha, and Sparc to Chris Lattner
EmitFunctionHeader: 7 files changed, 16 insertions(+), 210 deletions(-) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94630 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-27Eliminate target hook IsEligibleForTailCallOptimization.Evan Cheng
Target independent isel should always pass along the "tail call" property. Change target hook LowerCall's parameter "isTailCall" into a refernce. If the target decides it's impossible to honor the tail call request, it should set isTailCall to false to make target independent isel happy. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94626 91177308-0d34-0410-b5e6-96231b3b80d8
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