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AgeCommit message (Expand)Author
2013-04-17R600: Make Export Instruction not duplicableVincent Lejeune
2013-04-17R600: Export is emitted as a CF_NATIVE instVincent Lejeune
2013-04-17R600: Emit used GPRs countVincent Lejeune
2013-04-15R600/SI: Emit config values in register value pairs.Tom Stellard
2013-04-15R600/SI: Emit configuration value in the .AMDGPU.config ELF sectionTom Stellard
2013-04-15R600: Emit ELF formatted code rather than raw ISA.Tom Stellard
2013-04-11R600ControlFlowFinalizer.cpp: Fix a warning. [-Wunused-variable]NAKAMURA Takumi
2013-04-11Whitespace.NAKAMURA Takumi
2013-04-10R600/SI: Add pattern for AMDGPUurecipMichel Danzer
2013-04-10R600: Add VTX_READ_* and RAT_WRITE_CACHELESS_* when computing cf addrVincent Lejeune
2013-04-10R600/SI: dynamical figure out the reg class of MIMGChristian Konig
2013-04-10R600/SI: adjust writemask to only the used componentsChristian Konig
2013-04-10R600/SI: remove image sample writemaskChristian Konig
2013-04-08R600: Control Flow support for pre EG genVincent Lejeune
2013-04-05R600/SI: Add support for buffer stores v2Tom Stellard
2013-04-05R600/SI: Use same names for corresponding MUBUF operands and encoding fieldsTom Stellard
2013-04-05R600: Add RV670 processorTom Stellard
2013-04-05R600/SI: Add processor types for each SI variantTom Stellard
2013-04-05R600/SI: Avoid generating S_MOVs with 64-bit immediates v2Tom Stellard
2013-04-04R600: Use a mask for offsets when encoding instructionsVincent Lejeune
2013-04-04R600: Fix wrong address when substituting ENDIFVincent Lejeune
2013-04-04R600: Take export into account when computing cf addressVincent Lejeune
2013-04-03R600: Fix last ALU of a clause being emitted in a separate clauseVincent Lejeune
2013-04-03R600: Factorize maximum alu per clause in a single locationVincent Lejeune
2013-04-03R600: Simplify data structure and add DEBUG to R600ControlFlowFinalizerVincent Lejeune
2013-04-03R600: Consider KILLGT as an ALU instructionVincent Lejeune
2013-04-01Target/R600: Fix CMake build to add missing files.NAKAMURA Takumi
2013-04-01R600: Add support for native control flowVincent Lejeune
2013-04-01R600/SI: Share code recording ShaderTypeAttribute between generationsVincent Lejeune
2013-04-01R600: Emit CF_ALU and use true kcache register.Vincent Lejeune
2013-03-31R600: Emit native instructions for texVincent Lejeune
2013-03-28These two are default in the constructor for MCAsmInfo.Eric Christopher
2013-03-27R600/SI: add SETO/SETUO patternsChristian Konig
2013-03-27R600/SI: add cummuting of rev instructionsChristian Konig
2013-03-27R600/SI: add mulhu/mulhs patternsChristian Konig
2013-03-27R600/SI: add srl/sha patterns for SIChristian Konig
2013-03-26R600/SIMCCodeEmitter.cpp: Prune a couple of unused members, STI and Ctx. [-Wu...NAKAMURA Takumi
2013-03-26R600/SI: improve post ISel foldingChristian Konig
2013-03-26R600/SI: improve vector interpolationChristian Konig
2013-03-26R600/SI: avoid unecessary subreg extraction in IMAGE_SAMPLEChristian Konig
2013-03-26R600/SI: switch back to RegPressure schedulingChristian Konig
2013-03-26R600/SI: mark most intrinsics as readnone v2Christian Konig
2013-03-26R600/SI: replace WQM intrinsicChristian Konig
2013-03-26R600/SI: fix ELSE pseudo op handlingChristian Konig
2013-03-26R600: fix DenseMap with pointer key iteration in the structurizerChristian Konig
2013-03-22R600: Use legacy (0 * anything = 0) MUL instructions for pow intrinsicsMichel Danzer
2013-03-18R600/SI: implement indirect adressing for SIChristian Konig
2013-03-18R600/SI: add float vector typesChristian Konig
2013-03-18R600/SI: add shl patternChristian Konig
2013-03-18R600/SI: add BUFFER_LOAD_DWORD patternChristian Konig
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