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path: root/lib/Target/PowerPC/PPCScheduleG3.td
AgeCommit message (Expand)Author
2012-08-28Split several PPC instruction classes.Hal Finkel
2012-06-12Split out the PPC instruction class IntSimple from IntGeneral.Hal Finkel
2012-04-01Split the LdStGeneral PPC itin. class into LdStLoad and LdStStore.Hal Finkel
2012-02-18Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,...Jia Liu
2010-09-28Add support to model pipeline bypass / forwarding.Evan Cheng
2010-04-18Make processor FUs unique for given itinerary. This extends the limit of 32Anton Korobeynikov
2007-12-29Remove attribution from file headers, per discussion on llvmdev.Chris Lattner
2005-10-19Added InstrSchedClass to each of the PowerPC Instructions.Jim Laskey
2005-10-19Push processor descriptions to the top of target and add command line info.Jim Laskey
2005-10-18Simple edits; remove unimplimented cases and clarify long haul SLU cases.Jim Laskey
2005-10-18Checking in first round of scheduling tablegen files. Not tied in as yet.Jim Laskey