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path: root/lib/Target/Hexagon/HexagonInstrInfo.td
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2013-03-28Hexagon: Replace switch-case in isDotNewInst with TSFlags.Jyotsna Verma
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178281 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-28Hexagon: Use multiclass for gp-relative instructions.Jyotsna Verma
Remove noV4T gp-relative instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178246 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-26Hexagon: Use multiclass for aslh, asrh, sxtb, sxth, zxtb and zxth.Jyotsna Verma
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178032 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-08Hexagon: Add patterns for zero extended loads from i1->i64.Jyotsna Verma
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176689 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-07Hexagon: Add support to lower block address.Jyotsna Verma
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176637 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05reverting patch 176508.Jyotsna Verma
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176513 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05Hexagon: Add support for lowering block address.Jyotsna Verma
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176508 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05Hexagon: Add encoding bits to the TFR64 instructions.Jyotsna Verma
Set imMoveImm, isAsCheapAsAMove flags for TFRI instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176499 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14Hexagon: Change insn class to support instruction encoding.Jyotsna Verma
This patch doesn't introduce any functionality changes. It adds some new fields to the Hexagon instruction classes and changes their layout to support instruction encoding. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175205 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05Move MRI liveouts to Hexagon return instructions.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174407 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-04Hexagon: Add V4 combine instructions and some more Def Pats for V2.Jyotsna Verma
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174331 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-29Use multiclass for post-increment store instructions.Jyotsna Verma
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173816 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-29Add constant extender support for MInst type instructions.Jyotsna Verma
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173813 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-07Remove more unnecessary # operators with nothing to paste proceeding them.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171702 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-07Remove # from the beginning and end of def names. The # is a paste operator ↵Craig Topper
and should only be used with something to paste on either side. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171697 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20Add constant extender support to GP-relative load/store instructions.Jyotsna Verma
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170672 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04Add patterns to define 'combine', 'tstbit', 'ct0/cl0' (count ↵Jyotsna Verma
trailing/leading zeros) instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169287 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04Add constant extender support to ALU32 instructions for V2.Jyotsna Verma
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169284 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04Move all operand definitions into HexagonOperands.tdJyotsna Verma
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169213 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04Move generic Hexagon subtarget information into Hexagon.tdJyotsna Verma
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169212 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-03Define store instructions with base+immediate offset addressing modeJyotsna Verma
using multiclass. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169168 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-03Define load instructions with base+immediate offset addressing modeJyotsna Verma
using multiclass. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169153 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-30Use multiclass for the load instructions with MEMri operand.Jyotsna Verma
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169018 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-30Use multiclass for the store instructions with MEMri operand.Jyotsna Verma
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168983 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-29Use multiclass for 'transfer' instructions.Jyotsna Verma
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168929 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-21Renamed HexagonImmediates.td -> HexagonOperands.td.Jyotsna Verma
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168434 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14Added multiclass for post-increment load instructions.Jyotsna Verma
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167974 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13Test commit.Jyotsna Verma
Add a blank line. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167819 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-01Use the relationship models infrastructure to add two relations - getPredOpcodePranav Bhandarkar
and getPredNewOpcode. The first relates non predicated instructions with their predicated forms and the second relates predicated instructions with their predicate-new forms. Patch by Jyotsna Verma! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167243 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-13[Hexagon] Don't mark callee saved registers as clobbered by a tail callArnold Schwaighofer
This was causing unnecessary spills/restores of callee saved registers. Fixes PR13572. Patch by Pranav Bhandarkar! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161778 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-13Remove variable_ops from call instructions in most targets.Jakob Stoklund Olesen
Call instructions are no longer required to be variadic, and variable_ops should only be used for instructions that encode a variable number of arguments, like the ARM stm/ldm instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160189 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-02Fix typos found by http://github.com/lyda/misspell-checkBenjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157885 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-14Revert 156634 upon request until code improvement changes are made.Brendon Cahoon
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156775 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-11Hexagon constant extender support.Brendon Cahoon
Patch by Jyotsna Verma. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156634 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-10Hexagon V5 FP Support.Sirish Pande
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156568 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-03Extensions of Hexagon V4 instructions.Sirish Pande
This adds new instructions for Hexagon V4 architecture. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156071 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23Revert r155365, r155366, and r155367. All three of these have regressionChandler Carruth
test suite failures. The failures occur at each stage, and only get worse, so I'm reverting all of them. Please resubmit these patches, one at a time, after verifying that the regression test suite passes. Never submit a patch without running the regression test suite. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155372 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23Hexagon V5 (floating point) support.Sirish Pande
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155367 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23Support for Hexagon architectural feature, new value jump.Sirish Pande
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155366 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-23Support for Hexagon VLIW Packetizer.Sirish Pande
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155365 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-18This reverts a long string of commits to the Hexagon backend. TheseChandler Carruth
commits have had several major issues pointed out in review, and those issues are not being addressed in a timely fashion. Furthermore, this was all committed leading up to the v3.1 branch, and we don't need piles of code with outstanding issues in the branch. It is possible that not all of these commits were necessary to revert to get us back to a green state, but I'm going to let the Hexagon maintainer sort that out. They can recommit, in order, after addressing the feedback. Reverted commits, with some notes: Primary commit r154616: HexagonPacketizer - There are lots of review comments here. This is the primary reason for reverting. In particular, it introduced large amount of warnings due to a bad construct in tablegen. - Follow-up commits that should be folded back into this when reposting: - r154622: CMake fixes - r154660: Fix numerous build warnings in release builds. - Please don't resubmit this until the three commits above are included, and the issues in review addressed. Primary commit r154695: Pass to replace transfer/copy ... - Reverted to minimize merge conflicts. I'm not aware of specific issues with this patch. Primary commit r154703: New Value Jump. - Primarily reverted due to merge conflicts. - Follow-up commits that should be folded back into this when reposting: - r154703: Remove iostream usage - r154758: Fix CMake builds - r154759: Fix build warnings in release builds - Please incorporate these fixes and and review feedback before resubmitting. Primary commit r154829: Hexagon V5 (floating point) support. - Primarily reverted due to merge conflicts. - Follow-up commits that should be folded back into this when reposting: - r154841: Remove unused variable (fixing build warnings) There are also accompanying Clang commits that will be reverted for consistency. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155047 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-16Hexagon V5 (Floating Point) Support.Sirish Pande
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154829 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-13Add support for Hexagon Architectural feature, New Value Jump.Sirish Pande
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154696 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-13Pass to replace tranfer/copy instructions into combine instruction where ↵Sirish Pande
possible. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154695 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-12HexagonPacketizer patch.Sirish Pande
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154616 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-12Hexagon: enable assembler output through the MC layer.Evandro Menezes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154597 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-22Efficient pattern for store truncate. Patch by Evandro Menezes.Sirish Pande
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151166 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-15Optimize redundant sign extends and negation of predicates.Sirish Pande
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150606 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-15Revert "Optimize redundant sign extends and negation of predicates"Eric Christopher
as it's breaking the build. This reverts commit 11241abca5e2a313412fed594bb9d9fa2a2057fb. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150604 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-15Optimize redundant sign extends and negation of predicatesSirish Pande
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150601 91177308-0d34-0410-b5e6-96231b3b80d8
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