| Age | Commit message (Expand) | Author |
|---|
| 2013-03-28 | Hexagon: Replace switch-case in isDotNewInst with TSFlags. | Jyotsna Verma |
| 2013-03-28 | Hexagon: Use multiclass for gp-relative instructions. | Jyotsna Verma |
| 2013-03-26 | Hexagon: Use multiclass for aslh, asrh, sxtb, sxth, zxtb and zxth. | Jyotsna Verma |
| 2013-03-08 | Hexagon: Add patterns for zero extended loads from i1->i64. | Jyotsna Verma |
| 2013-03-07 | Hexagon: Add support to lower block address. | Jyotsna Verma |
| 2013-03-05 | reverting patch 176508. | Jyotsna Verma |
| 2013-03-05 | Hexagon: Add support for lowering block address. | Jyotsna Verma |
| 2013-03-05 | Hexagon: Add encoding bits to the TFR64 instructions. | Jyotsna Verma |
| 2013-02-14 | Hexagon: Change insn class to support instruction encoding. | Jyotsna Verma |
| 2013-02-05 | Move MRI liveouts to Hexagon return instructions. | Jakob Stoklund Olesen |
| 2013-02-04 | Hexagon: Add V4 combine instructions and some more Def Pats for V2. | Jyotsna Verma |
| 2013-01-29 | Use multiclass for post-increment store instructions. | Jyotsna Verma |
| 2013-01-29 | Add constant extender support for MInst type instructions. | Jyotsna Verma |
| 2013-01-07 | Remove more unnecessary # operators with nothing to paste proceeding them. | Craig Topper |
| 2013-01-07 | Remove # from the beginning and end of def names. The # is a paste operator a... | Craig Topper |
| 2012-12-20 | Add constant extender support to GP-relative load/store instructions. | Jyotsna Verma |
| 2012-12-04 | Add patterns to define 'combine', 'tstbit', 'ct0/cl0' (count trailing/leading... | Jyotsna Verma |
| 2012-12-04 | Add constant extender support to ALU32 instructions for V2. | Jyotsna Verma |
| 2012-12-04 | Move all operand definitions into HexagonOperands.td | Jyotsna Verma |
| 2012-12-04 | Move generic Hexagon subtarget information into Hexagon.td | Jyotsna Verma |
| 2012-12-03 | Define store instructions with base+immediate offset addressing mode | Jyotsna Verma |
| 2012-12-03 | Define load instructions with base+immediate offset addressing mode | Jyotsna Verma |
| 2012-11-30 | Use multiclass for the load instructions with MEMri operand. | Jyotsna Verma |
| 2012-11-30 | Use multiclass for the store instructions with MEMri operand. | Jyotsna Verma |
| 2012-11-29 | Use multiclass for 'transfer' instructions. | Jyotsna Verma |
| 2012-11-21 | Renamed HexagonImmediates.td -> HexagonOperands.td. | Jyotsna Verma |
| 2012-11-14 | Added multiclass for post-increment load instructions. | Jyotsna Verma |
| 2012-11-13 | Test commit. | Jyotsna Verma |
| 2012-11-01 | Use the relationship models infrastructure to add two relations - getPredOpcode | Pranav Bhandarkar |
| 2012-08-13 | [Hexagon] Don't mark callee saved registers as clobbered by a tail call | Arnold Schwaighofer |
| 2012-07-13 | Remove variable_ops from call instructions in most targets. | Jakob Stoklund Olesen |
| 2012-06-02 | Fix typos found by http://github.com/lyda/misspell-check | Benjamin Kramer |
| 2012-05-14 | Revert 156634 upon request until code improvement changes are made. | Brendon Cahoon |
| 2012-05-11 | Hexagon constant extender support. | Brendon Cahoon |
| 2012-05-10 | Hexagon V5 FP Support. | Sirish Pande |
| 2012-05-03 | Extensions of Hexagon V4 instructions. | Sirish Pande |
| 2012-04-23 | Revert r155365, r155366, and r155367. All three of these have regression | Chandler Carruth |
| 2012-04-23 | Hexagon V5 (floating point) support. | Sirish Pande |
| 2012-04-23 | Support for Hexagon architectural feature, new value jump. | Sirish Pande |
| 2012-04-23 | Support for Hexagon VLIW Packetizer. | Sirish Pande |
| 2012-04-18 | This reverts a long string of commits to the Hexagon backend. These | Chandler Carruth |
| 2012-04-16 | Hexagon V5 (Floating Point) Support. | Sirish Pande |
| 2012-04-13 | Add support for Hexagon Architectural feature, New Value Jump. | Sirish Pande |
| 2012-04-13 | Pass to replace tranfer/copy instructions into combine instruction where poss... | Sirish Pande |
| 2012-04-12 | HexagonPacketizer patch. | Sirish Pande |
| 2012-04-12 | Hexagon: enable assembler output through the MC layer. | Evandro Menezes |
| 2012-02-22 | Efficient pattern for store truncate. Patch by Evandro Menezes. | Sirish Pande |
| 2012-02-15 | Optimize redundant sign extends and negation of predicates. | Sirish Pande |
| 2012-02-15 | Revert "Optimize redundant sign extends and negation of predicates" | Eric Christopher |
| 2012-02-15 | Optimize redundant sign extends and negation of predicates | Sirish Pande |
