Age | Commit message (Expand) | Author |
2011-10-27 | Remove the Alpha backend. | Dan Gohman |
2010-06-21 | Remove isTwoAddress from Alpha. | Eric Christopher |
2010-03-18 | use ins/outs. | Chris Lattner |
2008-12-03 | Rename isSimpleLoad to canFoldAsLoad, to better reflect its meaning. | Dan Gohman |
2008-02-16 | llvm.memory.barrier, and impl for x86 and alpha | Andrew Lenharth |
2008-01-06 | rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate. | Chris Lattner |
2008-01-06 | Change the 'isStore' inferrer to look for 'SDNPMayStore' | Chris Lattner |
2007-12-29 | Remove attribution from file headers, per discussion on llvmdev. | Chris Lattner |
2007-07-21 | No more noResults. | Evan Cheng |
2007-07-19 | Change instruction description to split OperandList into OutOperandList and | Evan Cheng |
2007-04-17 | Use this nifty Constraints thing and fix the inverted conditional moves | Andrew Lenharth |
2006-10-31 | Add all that branch mangling niftiness | Andrew Lenharth |
2006-06-12 | Let the alpha breakage begin. First Formals and RET. next Calls | Andrew Lenharth |
2006-03-09 | Alpha Scheduling classes | Andrew Lenharth |
2006-02-01 | Add immediate forms of cmov and remove some cruft | Andrew Lenharth |
2006-01-26 | minor renaming | Andrew Lenharth |
2006-01-26 | allow R28 to be used for frame calculations without entirely removing it from... | Andrew Lenharth |
2006-01-16 | stack and rpcc | Andrew Lenharth |
2006-01-01 | Move brcond over and fix some imm patterns. This may be the last change befo... | Andrew Lenharth |
2005-12-25 | add br pattern, unify JSR and BSR ISel instrs, and add BSR support for DAG | Andrew Lenharth |
2005-12-24 | Unify the patterns for loads and stores. Now offset addressing should be | Andrew Lenharth |
2005-12-24 | move loads and stores over. Smart addr selection comming | Andrew Lenharth |
2005-12-06 | OK, this does wonders for broken stuff | Andrew Lenharth |
2005-12-06 | added instructions with inverted immediates | Andrew Lenharth |
2005-12-05 | These never trigger, but whatever | Andrew Lenharth |
2005-11-30 | All sorts of stuff. | Andrew Lenharth |
2005-11-22 | massive DAGISel patch. lots and lots more stuff compiles now | Andrew Lenharth |
2005-11-11 | continued readcyclecounter support | Andrew Lenharth |
2005-11-09 | whatever. Intermediate patch to see what breaks. Seems ok. | Andrew Lenharth |
2005-10-26 | Simplify instinfo, set random bits on more fp insts, and fix 1 opcode | Andrew Lenharth |
2005-10-22 | Well, the Constant matching pattern works. Can't say much about calls or glo... | Andrew Lenharth |
2005-10-20 | Inst cleanup. As a bonus, operands are in the correct order for cmovs. Expe... | Andrew Lenharth |
2005-10-20 | added a few 1 operand form stuff. Seems to break regalloc on alpha. sigh | Andrew Lenharth |
2005-10-20 | ret 0; works, not much else | Andrew Lenharth |
2005-07-28 | support bsr, and more .td simplification | Andrew Lenharth |
2005-07-22 | simpilfy instruction encoding (and make the lines way shorter, aka Misha happ... | Andrew Lenharth |
2005-02-05 | Make the rest of file header comments consistent in format and style | Misha Brukman |
2005-01-26 | initial fp support | Andrew Lenharth |
2005-01-24 | Clean ups, and taught the instruction selector about immediate forms | Andrew Lenharth |
2005-01-22 | Let me introduce you to the early stages of the llvm backend for the alpha pr... | Andrew Lenharth |