aboutsummaryrefslogtreecommitdiff
path: root/lib/Target/ARM
AgeCommit message (Expand)Author
2010-11-02Remove an assert - it's possible to be hit, and we just want to avoidEric Christopher
2010-11-02WhitespeaceEric Christopher
2010-11-02No really, no thumb1 for arm fast isel. Also add an informative comment asEric Christopher
2010-11-02Attempt to provide correct encodings for a number of other vld1 variants, whi...Owen Anderson
2010-11-02Add aesthetic break.Owen Anderson
2010-11-02Add correct NEON encodings for the "multiple single elements" form of vld.Owen Anderson
2010-11-01Explicitly check for non-consant reference in an LDRi12 instruction. Add FIXMEJim Grosbach
2010-11-01Remove unused function.Jim Grosbach
2010-11-01Add support for alignment operands on VLD1-lane instructions.Bob Wilson
2010-11-01Missed reverting this bit.Bill Wendling
2010-11-01Minor cleanup.Bill Wendling
2010-11-01Add NEON VLD1-lane instructions. Partial fix for Radar 8599955.Bob Wilson
2010-11-01Move the machine operand MC encoding patterns to the parent classes.Bill Wendling
2010-11-01When we look at instructions to convert to setting the 's' flag, we need to lookBill Wendling
2010-11-01NEON does not support truncating vector stores. Radar 8598391.Bob Wilson
2010-11-01Add FIXME.Jim Grosbach
2010-11-01Add 'IsThumb' predicate to patterns marked as 'IsThumb1Only'. The latter gatesJim Grosbach
2010-11-01Mark ARM subtarget features that are available for the assembler.Jim Grosbach
2010-11-01trailing whitespaceJim Grosbach
2010-11-01The T2 extract/pack instructions are only valid in Thumb2 mode. Mark theJim Grosbach
2010-11-01Move instruction encoding bits into the parent class and remove the temporaryBill Wendling
2010-11-01reject instructions that contain a \n in their asmstring. MarkChris Lattner
2010-10-31fix the !eq operator in tblgen to return a bit instead of an int.Chris Lattner
2010-10-31two changes: make the asmmatcher generator ignore ARM pseudos properly,Chris Lattner
2010-10-31reapply r117858 with apparent editor malfunction fixed (somehow I Chris Lattner
2010-10-31revert r117858 while I check out a failure I missed.Chris Lattner
2010-10-31the asm matcher can't handle operands with modifiers (like ${foo:bar}).Chris Lattner
2010-10-30Make sure we have a legal type (and simple) before continuing.Eric Christopher
2010-10-30Add FIXME.Jim Grosbach
2010-10-30Tidy up.Jim Grosbach
2010-10-30simplify this code.Chris Lattner
2010-10-30split MaybeParseRegister into its two logical uses, eliminating malloc+free t...Chris Lattner
2010-10-30Avoid re-evaluating MI.getNumOperands() every iteration of the loop.Jim Grosbach
2010-10-30Overhaul memory barriers in the ARM backend. Radar 8601999.Bob Wilson
2010-10-30Encode the register list operands for ARM mode LDM/STM instructions.Jim Grosbach
2010-10-29Some instructions end with an "ls" prefix, but it doesn't indicate that they areBill Wendling
2010-10-29Remove hard tab characters.Jim Grosbach
2010-10-2980 column fix.Jim Grosbach
2010-10-29trailing whitespaceJim Grosbach
2010-10-29s/getNEONVcvtImm32/getNEONVcvtImm32OpValue/ to be consistent with other operandJim Grosbach
2010-10-29Fix fpscr <-> GPR latency info.Evan Cheng
2010-10-29add FIXMEJim Grosbach
2010-10-29Convert ARM::MOVi2pieces to a true pseudo-instruction and expand it inJim Grosbach
2010-10-29Handle comparison values we already have - this fixes the consumer-typesetEric Christopher
2010-10-29ARM::MOVi32imm is expanded in ARMExpandPseudoInsts, so there's no need toJim Grosbach
2010-10-29Fix typo.Jim Grosbach
2010-10-29ARM encoding information for CLREX, SWP and SWPB. Add comment for sjlj pseudo...Jim Grosbach
2010-10-29ARM mode LDREX*/STREX* binary encodings.Jim Grosbach
2010-10-29Encoding information for ARM conditional move instructions.Jim Grosbach
2010-10-29Avoiding overly aggressive latency scheduling. If the two nodes share anEvan Cheng