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AgeCommit message (Expand)Author
2010-11-10Move LDM predicate operand encoding into base clase. Add STM missing STMJim Grosbach
2010-11-10ARM LDM encoding for the mode (ia, ib, da, db) operand.Jim Grosbach
2010-11-10Fix ARM encoding of non-return LDM instructions.Jim Grosbach
2010-11-10Fix ARM encoding of LDM+Return instruction.Jim Grosbach
2010-11-10Fix an issue where we tried to turn a v2f32 build_vector into a v4i32 build v...Nate Begeman
2010-11-10Simplify and clean up MC symbol lookup for ARM constant pool values. This fixesJim Grosbach
2010-11-10Update ARMConstantPoolValue to not use a modifier string. Use an explicitJim Grosbach
2010-11-10Emit a '!' if this is a "writeback" register or memory address.Bill Wendling
2010-11-10Rename a parameter to avoid confusion with a local variableMatt Beaumont-Gay
2010-11-09Emit the warning about the register list not being in ascending order only once.Bill Wendling
2010-11-09s/std::vector/SmallVector/Bill Wendling
2010-11-09Delete the allocated vector.Bill Wendling
2010-11-09Define the subtarget feature for the architecture version,Bob Wilson
2010-11-09Do not use MEMBARRIER_MCR for any Thumb code.Bob Wilson
2010-11-09Two types of instructions have register lists:Bill Wendling
2010-11-09Change the ARMConstantPoolValue modifier string to an enumeration. This willJim Grosbach
2010-11-09Handle ARM constant pool values that need an explicit reference to the '.'Jim Grosbach
2010-11-09Trailing whitespace.Jim Grosbach
2010-11-09Further MCize ARM constant pool values. This allows basic PIC references forJim Grosbach
2010-11-09Add encoding of Rt to ARM LDR/STR w/ reg+reg offset encoding.Jim Grosbach
2010-11-09For ARM load/store instructions, encode [reg+reg] with no shifter immediate asJim Grosbach
2010-11-09ARM .word data fixups don't need an adjustment.Jim Grosbach
2010-11-09Add encoder method for ARM load/store shifted register offset operands.Jim Grosbach
2010-11-09Add support for a few simple fixups to the ARM Darwin asm backend. This allowsJim Grosbach
2010-11-09Revert r118457 and r118458. These won't hold for GPRs.Bill Wendling
2010-11-08Get the register and count from the register list operands.Bill Wendling
2010-11-08reglist has two operands.Bill Wendling
2010-11-08The "addRegListOperands()" function returns the start register and the totalBill Wendling
2010-11-08Add support for ARM's specialized vector-compare-against-zero instructions.Owen Anderson
2010-11-08Add "write back" bit encoding.Bill Wendling
2010-11-08Revert 118422 in search of bot verdancy.Dale Johannesen
2010-11-08Support -mcpu=cortex-a8 in ARM attributes - Has Fixme. 1 Test modified.Jason W Kim
2010-11-08Complete listing of ARM/MC/ELF relocation enumsJason W Kim
2010-11-08Make RegList an ASM operand so that TableGen will generate code for it. This isBill Wendling
2010-11-08Revert.Bill Wendling
2010-11-07In this context, a reglist is a reg.Bill Wendling
2010-11-06Add support for parsing register lists. We can't use a bitfield to keep track ofBill Wendling
2010-11-06Return the base register of a register list for the "getReg()" method. This isBill Wendling
2010-11-06General cleanup:Bill Wendling
2010-11-06Add a RegList (register list) object to ARMOperand. It will be used soon to holdBill Wendling
2010-11-06Fix grammar.Bill Wendling
2010-11-06Fix grammar.Bill Wendling
2010-11-06MatchRegisterName() returns 0 if it can't match the register.Bill Wendling
2010-11-06Use TryParseRegister() instead of MatchRegisterName(). The former returns -1Bill Wendling
2010-11-06Make sure we have movw on the target before using it.Eric Christopher
2010-11-05Hook up the '.code {16|32}' directive to the streamer.Jim Grosbach
2010-11-05Hook up the '.thumb_func' directive to the streamer.Jim Grosbach
2010-11-05Fix past-o.Jim Grosbach
2010-11-05MC'ize the '.code 16' and '.thumb_func' ARM directives.Jim Grosbach
2010-11-05Disallow the certain NEON modified-immediate forms when generating vorr or vbic.Owen Anderson