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path: root/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
AgeCommit message (Expand)Author
2013-02-22Make ARMAsmPrinter generate the correct alignment specifier syntax in instruc...Kristof Beyls
2012-12-05Added a option to the disassembler to print immediates as hex.Kevin Enderby
2012-12-03Use the new script to sort the includes of every file under lib.Chandler Carruth
2012-11-16Remove hard coded registers in ARM ldrexd and strexd instructionsWeiming Zhao
2012-10-30ARM: Better disassembly for pc-relative LDR.Jim Grosbach
2012-10-23Make branch heavy code for generating marked up disassembly simplerKevin Enderby
2012-10-22Add support for annotated disassembly output for X86 and arm.Kevin Enderby
2012-09-22ARMInstPrinter.cpp: Fix a warning in -Asserts. [-Wunused-variable]NAKAMURA Takumi
2012-09-22Whitespace.NAKAMURA Takumi
2012-09-22Fix edge cases of ARM shift operands in arith instructions.Tim Northover
2012-09-22Fix the handling of edge cases in ARM shifted operands.Tim Northover
2012-08-02Fix #13035, a bug around Thumb instruction LDRD/STRD with negative #0 offset ...Jiangning Liu
2012-08-02Fix #13241, a bug around shift immediate operand for ARM instruction ADR.Jiangning Liu
2012-06-18ARM: Define generic HINT instruction.Jim Grosbach
2012-06-15Fix the encoding of the armv7m (MClass) for MSR registers other than aspr,Kevin Enderby
2012-05-17Fix the encoding of the armv7m (MClass) for MSR APSR writes which was missingKevin Enderby
2012-05-11Fixed the LLVM ARM v7 assembler and instruction printer for 8-bit immediate o...Silviu Baranga
2012-04-27Refactor IT handling not to store the bottom bit of the condition code in the...Richard Barton
2012-04-13For ARM disassembly only print 32 unsigned bits for the address of branchKevin Enderby
2012-04-02Move getOpcodeName from the various target InstPrinters into the superclass M...Benjamin Kramer
2012-04-02Remove getInstructionName from MCInstPrinter implementations in favor of usin...Craig Topper
2012-04-02Make MCInstrInfo available to the MCInstPrinter. This will be used to remove ...Craig Topper
2012-03-06ARM more NEON VLD/VST composite physical register refactoring.Jim Grosbach
2012-03-06ARM refactor more NEON VLD/VST instructions to use composite physregsJim Grosbach
2012-03-06Tidy up. Kill some dead code.Jim Grosbach
2012-03-05ARM Refactor VLD/VST spaced pair instructions.Jim Grosbach
2012-03-05ARM refactor away a bunch of VLD/VST pseudo instructions.Jim Grosbach
2012-03-05Make MCRegisterInfo available to the the MCInstPrinter.Jim Grosbach
2012-03-01Change ARMInstPrinter::printPredicateOperand() so it will not abort if itKevin Enderby
2012-02-19Remove dead code. Improve llvm_unreachable text. Simplify some control flow.Ahmed Charles
2012-02-07Convert assert(0) to llvm_unreachableCraig Topper
2012-01-25NEON VLD4(all lanes) assembly parsing and encoding.Jim Grosbach
2012-01-24NEON VLD3(all lanes) assembly parsing and encoding.Jim Grosbach
2012-01-24NEON VLD4(multiple 4 element structures) assembly parsing.Jim Grosbach
2012-01-23NEON VLD3(multiple 3-element structures) assembly parsing.Jim Grosbach
2011-12-22ARM VFP assembly parsing and encoding for VCVT(float <--> fixed point).Jim Grosbach
2011-12-21ARM NEON VLD2 assembly parsing for structure to all lanes, non-writeback.Jim Grosbach
2011-12-19ARM assembly parsing and encoding support for LDRD(label).Jim Grosbach
2011-12-14ARM NEON VST2 assembly parsing and encoding.Jim Grosbach
2011-11-30ARM parsing for VLD1 two register all lanes, no writeback.Jim Grosbach
2011-11-30ARM parsing aliases for VLD1 single register all lanes.Jim Grosbach
2011-11-07Simplify some uses of utohexstr.Benjamin Kramer
2011-11-02Fix the issue that r143552 was trying to address the _right_ way. One-regist...Owen Anderson
2011-10-21Assembly parsing for 4-register variant of VLD1.Jim Grosbach
2011-10-21Assembly parsing for 3-register variant of VLD1.Jim Grosbach
2011-10-21ARM VLD parsing and encoding.Jim Grosbach
2011-10-21whitespace.Jim Grosbach
2011-10-18ARM VTBL (one register) assembly parsing and encoding.Jim Grosbach
2011-10-12ARM parsing and encoding for the <option> form of LDC/STC instructions.Jim Grosbach
2011-10-1280 columns.Jim Grosbach
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