| Age | Commit message (Expand) | Author |
|---|
| 2011-03-03 | pr9367: Add missing predicated BLX instructions. | Bob Wilson |
| 2011-02-28 | Add missing whitespace in the formatting. | Kevin Enderby |
| 2011-02-28 | Fix the arm's disassembler for blx that was building an MCInst without the | Kevin Enderby |
| 2011-02-18 | Add assembly parsing support for "msr" and also fix its encoding. Also add | Bruno Cardoso Lopes |
| 2011-02-14 | Fix encoding and add parsing support for the arm/thumb CPS instruction: | Bruno Cardoso Lopes |
| 2011-02-08 | Revert both r121082 (which broke a bunch of constant pool stuff) and r125074 ... | Owen Anderson |
| 2011-01-28 | PR9030: Fix disassembly of ARM "mov pc, lr" instruction. | Bob Wilson |
| 2010-12-29 | CMake: Add disabling optimization on MSVC8 and MSVC10 as workaround for some ... | NAKAMURA Takumi |
| 2010-12-07 | Second attempt at converting Thumb2's LDRpci, including updating the gazillio... | Owen Anderson |
| 2010-12-01 | Add correct encodings for STRD and LDRD, including fixup support. Additional... | Owen Anderson |
| 2010-11-30 | Simplify the encoding of reg+/-imm12 values that allow PC-relative encoding. ... | Owen Anderson |
| 2010-11-30 | s/ARM::BRIND/ARM::BX/g to coincide with r120366. | Bill Wendling |
| 2010-11-29 | Pseudo-ize Thumb2 jump tables with explicit MC lowering to the raw | Jim Grosbach |
| 2010-11-16 | Encode the multi-load/store instructions with their respective modes ('ia', | Bill Wendling |
| 2010-11-03 | Add support to match @llvm.prefetch to pld / pldw / pli. rdar://8601536. | Evan Cheng |
| 2010-11-03 | Break ARM addrmode4 (load/store multiple base address) into its constituent | Jim Grosbach |
| 2010-10-28 | PLD, PLDW, PLI encodings, plus refactor their use of addrmode2. | Jim Grosbach |
| 2010-10-13 | Detabify and clean up 80 column violations. | Jim Grosbach |
| 2010-10-13 | Refactor the ARM 'setend' instruction pattern. Use a single instruction pattern | Jim Grosbach |
| 2010-10-11 | MSVC hangs on compilation of ARMDisassembler.cpp. PR6866 applied to ARM target. | Francois Pichet |
| 2010-09-28 | Add ARM Disassembler to the CMake build. | Oscar Fuentes |
| 2010-09-17 | Fix vmov.f64 disassembly on targets where sizeof(long) != 8. | Benjamin Kramer |
| 2010-09-16 | store MC FP immediates as a double instead of as an APFloat, thus avoiding an | Jim Grosbach |
| 2010-09-15 | Teach the MC disassembler to handle vmov.f32 and vmov.f64 immediate to register | Jim Grosbach |
| 2010-09-14 | Reapply r113875 with additional cleanups. | Jim Grosbach |
| 2010-09-08 | ARM/Disassembler: Fix definitions incompatible(unsigned and uint32_t) to Cygw... | NAKAMURA Takumi |
| 2010-09-07 | hopefully fix a problem building on cygwin-1.5 | Chris Lattner |
| 2010-08-27 | Change ARM VFP VLDM/VSTM instructions to use addressing mode #4, just like | Bob Wilson |
| 2010-08-17 | explicitly handle no-op cases for clarity. Fixes clang warning. | Jim Grosbach |
| 2010-08-17 | Change ARM PKHTB and PKHBT instructions to use a shift_imm operand to avoid | Bob Wilson |
| 2010-08-13 | Move the Thumb2 SSAT and USAT optional shift operator out of the | Bob Wilson |
| 2010-08-13 | Refactor the code for disassembling Thumb2 saturate instructions along the | Bob Wilson |
| 2010-08-12 | Cleaned up the for-disassembly-only entries in the arm instruction table so that | Johnny Chen |
| 2010-08-12 | The autogened decoder was confusing the ARM STRBT for ARM USAT, because the .td | Johnny Chen |
| 2010-08-11 | Changed the format of DMBsy, DSBsy, and friends from Pseudo to MiscFrm. | Johnny Chen |
| 2010-08-11 | Move the ARM SSAT and USAT optional shift amount operand out of the | Bob Wilson |
| 2010-08-11 | - Add subtarget feature -mattr=+db which determine whether an ARM cpu has the | Evan Cheng |
| 2010-08-11 | Add a separate ARM instruction format for Saturate instructions. | Bob Wilson |
| 2010-07-31 | Add support for disassembling VMVN (immediate) instructions. PR7747. | Bob Wilson |
| 2010-07-30 | Add a check in the ARM disassembler for NEON instructions that would | Bob Wilson |
| 2010-07-30 | Many Thumb2 instructions can reference the full ARM register set (i.e., | Jim Grosbach |
| 2010-07-29 | Don't assert on an unrecognized BrMiscFrm instruction. | Bob Wilson |
| 2010-07-20 | prune #includes a little. | Chris Lattner |
| 2010-07-16 | Add basic support to code-gen the ARM/Thumb2 bit-field insert (BFI) instruction | Jim Grosbach |
| 2010-07-12 | Convert some tab stops into spaces. | Duncan Sands |
| 2010-06-26 | Renumber NEON instruction formats to be consecutive. | Bob Wilson |
| 2010-06-25 | Rename ARM instruction formats NEONGetLnFrm, NEONSetLnFrm and NEONDupFrm to | Bob Wilson |
| 2010-06-25 | Remove unused NEONFrm and ThumbMiscFrm ARM instruction formats. | Bob Wilson |
| 2010-06-19 | Silence compiler warnings. | Dan Gohman |
| 2010-06-18 | Start TargetRegisterClass indices at 0 instead of 1, so that | Dan Gohman |
