Age | Commit message (Expand) | Author |
2011-04-05 | Make second source operand of LDRD pre/post explicit. | Jim Grosbach |
2011-04-05 | Check for invalid register encodings for UMAAL and friends where: | Johnny Chen |
2011-04-04 | RFE encoding should also specify the "should be" encoding bits. | Johnny Chen |
2011-04-04 | Fix incorrect alignment for NEON VST2b32_UPD. | Johnny Chen |
2011-04-04 | - Implement asm parsing support for LDRSBT, LDRHT, LDRSHT and STRHT | Bruno Cardoso Lopes |
2011-04-02 | Fixed a bug in disassembly of STR_POST, where the immediate is the second ope... | Johnny Chen |
2011-04-01 | Fix a LDRT/LDRBT decoding bug where for Encoding A2, if Inst{4} != 0, we shou... | Johnny Chen |
2011-04-01 | Fix LDRi12 immediate operand, which was changed to be the second operand in $... | Johnny Chen |
2011-03-31 | Apply again changes to support ARM memory asm parsing. I removed | Bruno Cardoso Lopes |
2011-03-31 | Add BLXi to the instruction table for disassembly purpose. | Johnny Chen |
2011-03-31 | Revert r128632 again, until I figure out what break the tests | Bruno Cardoso Lopes |
2011-03-31 | Reapply r128585 without generating a lib depedency cycle. An updated log: | Bruno Cardoso Lopes |
2011-03-29 | Get rid of the non-writeback versions VLDMDB and VSTMDB, which don't actually... | Owen Anderson |
2011-03-28 | Fix ARM disassembly for PLD/PLDW/PLI which suffers from code rot and add some... | Johnny Chen |
2011-03-25 | Instruction formats of SWP/SWPB were changed from LdStExFrm to MiscFrm. Modi... | Johnny Chen |
2011-03-25 | Also need to handle invalid imod values for CPS2p. | Johnny Chen |
2011-03-24 | Handle the added VBICiv*i* NEON instructions, too. | Johnny Chen |
2011-03-24 | The r118201 added support for VORR (immediate). Update ARMDisassemblerCore.c... | Johnny Chen |
2011-03-24 | Add comments to the handling of opcode CPS3p to reject invalid instruction en... | Johnny Chen |
2011-03-24 | CPS3p: Let's reject impossible imod values by returning false from the Disass... | Johnny Chen |
2011-03-24 | Load/Store Multiple: | Johnny Chen |
2011-03-24 | The r128103 fix to cope with the removal of addressing modes from the MC inst... | Johnny Chen |
2011-03-22 | A8.6.399 VSTM: | Johnny Chen |
2011-03-19 | Fixed an assert by the ARM disassembler for LDRD_PRE/POST. | Johnny Chen |
2011-03-15 | There were two issues fixed: | Johnny Chen |
2011-03-15 | Fixed an ARM disassembler bug where it does not handle STRi12 correctly becau... | Johnny Chen |
2011-03-03 | pr9367: Add missing predicated BLX instructions. | Bob Wilson |
2011-02-18 | Add assembly parsing support for "msr" and also fix its encoding. Also add | Bruno Cardoso Lopes |
2011-02-14 | Fix encoding and add parsing support for the arm/thumb CPS instruction: | Bruno Cardoso Lopes |
2011-01-28 | PR9030: Fix disassembly of ARM "mov pc, lr" instruction. | Bob Wilson |
2010-11-30 | s/ARM::BRIND/ARM::BX/g to coincide with r120366. | Bill Wendling |
2010-11-29 | Pseudo-ize Thumb2 jump tables with explicit MC lowering to the raw | Jim Grosbach |
2010-11-16 | Encode the multi-load/store instructions with their respective modes ('ia', | Bill Wendling |
2010-11-03 | Break ARM addrmode4 (load/store multiple base address) into its constituent | Jim Grosbach |
2010-10-28 | PLD, PLDW, PLI encodings, plus refactor their use of addrmode2. | Jim Grosbach |
2010-10-13 | Detabify and clean up 80 column violations. | Jim Grosbach |
2010-10-13 | Refactor the ARM 'setend' instruction pattern. Use a single instruction pattern | Jim Grosbach |
2010-09-17 | Fix vmov.f64 disassembly on targets where sizeof(long) != 8. | Benjamin Kramer |
2010-09-16 | store MC FP immediates as a double instead of as an APFloat, thus avoiding an | Jim Grosbach |
2010-09-15 | Teach the MC disassembler to handle vmov.f32 and vmov.f64 immediate to register | Jim Grosbach |
2010-09-14 | Reapply r113875 with additional cleanups. | Jim Grosbach |
2010-08-27 | Change ARM VFP VLDM/VSTM instructions to use addressing mode #4, just like | Bob Wilson |
2010-08-17 | explicitly handle no-op cases for clarity. Fixes clang warning. | Jim Grosbach |
2010-08-17 | Change ARM PKHTB and PKHBT instructions to use a shift_imm operand to avoid | Bob Wilson |
2010-08-12 | Cleaned up the for-disassembly-only entries in the arm instruction table so that | Johnny Chen |
2010-08-12 | The autogened decoder was confusing the ARM STRBT for ARM USAT, because the .td | Johnny Chen |
2010-08-11 | Changed the format of DMBsy, DSBsy, and friends from Pseudo to MiscFrm. | Johnny Chen |
2010-08-11 | Move the ARM SSAT and USAT optional shift amount operand out of the | Bob Wilson |
2010-08-11 | - Add subtarget feature -mattr=+db which determine whether an ARM cpu has the | Evan Cheng |
2010-08-11 | Add a separate ARM instruction format for Saturate instructions. | Bob Wilson |