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path: root/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
AgeCommit message (Expand)Author
2011-04-05Make second source operand of LDRD pre/post explicit.Jim Grosbach
2011-04-05Check for invalid register encodings for UMAAL and friends where:Johnny Chen
2011-04-04RFE encoding should also specify the "should be" encoding bits.Johnny Chen
2011-04-04Fix incorrect alignment for NEON VST2b32_UPD.Johnny Chen
2011-04-04- Implement asm parsing support for LDRSBT, LDRHT, LDRSHT and STRHTBruno Cardoso Lopes
2011-04-02Fixed a bug in disassembly of STR_POST, where the immediate is the second ope...Johnny Chen
2011-04-01Fix a LDRT/LDRBT decoding bug where for Encoding A2, if Inst{4} != 0, we shou...Johnny Chen
2011-04-01Fix LDRi12 immediate operand, which was changed to be the second operand in $...Johnny Chen
2011-03-31Apply again changes to support ARM memory asm parsing. I removedBruno Cardoso Lopes
2011-03-31Add BLXi to the instruction table for disassembly purpose.Johnny Chen
2011-03-31Revert r128632 again, until I figure out what break the testsBruno Cardoso Lopes
2011-03-31Reapply r128585 without generating a lib depedency cycle. An updated log:Bruno Cardoso Lopes
2011-03-29Get rid of the non-writeback versions VLDMDB and VSTMDB, which don't actually...Owen Anderson
2011-03-28Fix ARM disassembly for PLD/PLDW/PLI which suffers from code rot and add some...Johnny Chen
2011-03-25Instruction formats of SWP/SWPB were changed from LdStExFrm to MiscFrm. Modi...Johnny Chen
2011-03-25Also need to handle invalid imod values for CPS2p.Johnny Chen
2011-03-24Handle the added VBICiv*i* NEON instructions, too.Johnny Chen
2011-03-24The r118201 added support for VORR (immediate). Update ARMDisassemblerCore.c...Johnny Chen
2011-03-24Add comments to the handling of opcode CPS3p to reject invalid instruction en...Johnny Chen
2011-03-24CPS3p: Let's reject impossible imod values by returning false from the Disass...Johnny Chen
2011-03-24Load/Store Multiple:Johnny Chen
2011-03-24The r128103 fix to cope with the removal of addressing modes from the MC inst...Johnny Chen
2011-03-22A8.6.399 VSTM:Johnny Chen
2011-03-19Fixed an assert by the ARM disassembler for LDRD_PRE/POST.Johnny Chen
2011-03-15There were two issues fixed:Johnny Chen
2011-03-15Fixed an ARM disassembler bug where it does not handle STRi12 correctly becau...Johnny Chen
2011-03-03pr9367: Add missing predicated BLX instructions.Bob Wilson
2011-02-18Add assembly parsing support for "msr" and also fix its encoding. Also addBruno Cardoso Lopes
2011-02-14Fix encoding and add parsing support for the arm/thumb CPS instruction:Bruno Cardoso Lopes
2011-01-28PR9030: Fix disassembly of ARM "mov pc, lr" instruction.Bob Wilson
2010-11-30s/ARM::BRIND/ARM::BX/g to coincide with r120366.Bill Wendling
2010-11-29Pseudo-ize Thumb2 jump tables with explicit MC lowering to the rawJim Grosbach
2010-11-16Encode the multi-load/store instructions with their respective modes ('ia',Bill Wendling
2010-11-03Break ARM addrmode4 (load/store multiple base address) into its constituentJim Grosbach
2010-10-28PLD, PLDW, PLI encodings, plus refactor their use of addrmode2.Jim Grosbach
2010-10-13Detabify and clean up 80 column violations.Jim Grosbach
2010-10-13Refactor the ARM 'setend' instruction pattern. Use a single instruction patternJim Grosbach
2010-09-17Fix vmov.f64 disassembly on targets where sizeof(long) != 8.Benjamin Kramer
2010-09-16store MC FP immediates as a double instead of as an APFloat, thus avoiding anJim Grosbach
2010-09-15Teach the MC disassembler to handle vmov.f32 and vmov.f64 immediate to registerJim Grosbach
2010-09-14Reapply r113875 with additional cleanups.Jim Grosbach
2010-08-27Change ARM VFP VLDM/VSTM instructions to use addressing mode #4, just likeBob Wilson
2010-08-17explicitly handle no-op cases for clarity. Fixes clang warning.Jim Grosbach
2010-08-17Change ARM PKHTB and PKHBT instructions to use a shift_imm operand to avoidBob Wilson
2010-08-12Cleaned up the for-disassembly-only entries in the arm instruction table so thatJohnny Chen
2010-08-12The autogened decoder was confusing the ARM STRBT for ARM USAT, because the .tdJohnny Chen
2010-08-11Changed the format of DMBsy, DSBsy, and friends from Pseudo to MiscFrm.Johnny Chen
2010-08-11Move the ARM SSAT and USAT optional shift amount operand out of theBob Wilson
2010-08-11- Add subtarget feature -mattr=+db which determine whether an ARM cpu has theEvan Cheng
2010-08-11Add a separate ARM instruction format for Saturate instructions.Bob Wilson