| Age | Commit message (Expand) | Author |
|---|
| 2010-05-22 | Implement eh.sjlj.longjmp for ARM. Clean up the intrinsic a bit. | Jim Grosbach |
| 2010-05-19 | Use 'adr' for LEApcrel and LEApcrel. Mark LEApcrel re-materializable. | Evan Cheng |
| 2010-05-19 | Mark pattern-less mayLoad / mayStore instructions neverHasSideEffects. These ... | Evan Cheng |
| 2010-05-19 | Mark a few more pattern-less instructions with neverHasSideEffects. This is e... | Evan Cheng |
| 2010-05-16 | Chris said that the comment char should be escaped. Fix all the occurences of... | Anton Korobeynikov |
| 2010-05-15 | "trap" pseudo-op turned out to be apple-local. | Anton Korobeynikov |
| 2010-05-11 | Select @llvm.trap to the special B with 1111 condition (i.e. trap) instruction. | Evan Cheng |
| 2010-05-05 | Cleanup of ARMv7M support. Move hardware divide and Thumb2 extract/pack | Jim Grosbach |
| 2010-05-05 | Add initial support for ARMv7M subtarget and cortex-m3 cpu. Patch by | Jim Grosbach |
| 2010-04-16 | Multiclass LdStCop was using pre-UAL syntax LDC<c>L for the L fragment. Changed | Johnny Chen |
| 2010-04-15 | Fixed a bug in ARM disassembly where LDRSBT should have am3offset operand, not | Johnny Chen |
| 2010-04-09 | Provide versions of the ARM eh_sjlj_setjmp instructions for non-VFP subtargets | Bob Wilson |
| 2010-03-24 | Make the use of the vmla and vmls VFP instructions controllable via cmd line. | Jim Grosbach |
| 2010-03-20 | Re-commit r98683 ("remove redundant writeback flag from ARM address mode 6") | Bob Wilson |
| 2010-03-19 | Revert r98679. The disassembler will be updated to depend on the existence of | Johnny Chen |
| 2010-03-19 | Revert this change, since it was causing ARM performance regressions. | Bob Wilson |
| 2010-03-19 | set SDNPVariadic on nodes throughout the rest of the targets that | Chris Lattner |
| 2010-03-18 | Get rid of target-specific fp <-> int nodes when still I'm here. | Anton Korobeynikov |
| 2010-03-16 | Revert 98683. It is breaking something in the disassembler. | Bob Wilson |
| 2010-03-16 | Remove redundant writeback flag from ARM address mode 6. Also remove the | Bob Wilson |
| 2010-03-16 | Disambiguate the *_UPD and * variants by specifying the writeback flag as 1. | Johnny Chen |
| 2010-03-16 | Remove the writeback flag from ARM's address mode 4. Now that we have separate | Bob Wilson |
| 2010-03-13 | Attempt to appease the arm-linux buildbot by fixing the JIT encodings for new | Bob Wilson |
| 2010-03-13 | Change ARM ld/st multiple instructions to have variant instructions for | Bob Wilson |
| 2010-03-10 | Factored out the disassembly printing of CPS option, MSR mask, and Negative Zero | Johnny Chen |
| 2010-03-09 | MSR (Move to Special Register from ARM core register) requires a mask to specify | Johnny Chen |
| 2010-03-08 | fix a bunch of partially ambiguous patterns on ARM. As an | Chris Lattner |
| 2010-03-06 | Initial bits of ARMv4-only support. | Anton Korobeynikov |
| 2010-03-02 | Change some asm shift opcode strings to lowercase. | Johnny Chen |
| 2010-03-01 | Added STRHT for disassembly only and fixed a bug in AI3sthpo class where the W | Johnny Chen |
| 2010-02-27 | The mayHaveSideEffects flag is no longer used. | Dan Gohman |
| 2010-02-26 | Added the follwoing 32-bit Thumb instructions for disassembly only: | Johnny Chen |
| 2010-02-22 | Updated version of r96634 (which was reverted due to failing 176.gcc and | Jim Grosbach |
| 2010-02-22 | Added SEL, SXTB16, SXTAB16, UXTAB16, SMMULR, SMMLAR, SMMLSR, SMUAD, and SMUSD, | Johnny Chen |
| 2010-02-22 | Added a bunch of instructions for disassembly only: | Johnny Chen |
| 2010-02-21 | Undo r96654. The printing of ARM shift instructions in canonical forms can be | Johnny Chen |
| 2010-02-19 | Added entries for ASR, LSL, LSR, ROR, and RRX so that the disassembler prints | Johnny Chen |
| 2010-02-18 | Added LDRD_PRE/POST & STRD_PRE/POST for disassembly only. | Johnny Chen |
| 2010-02-18 | Added LDRSBT, LDRHT, LDRSHT for disassembly only. And fixed encoding errors | Johnny Chen |
| 2010-02-18 | Added for disassembly only the variants of DMB, DSB, and ISB. | Johnny Chen |
| 2010-02-17 | Added CLREX (Clear-Exclusive) for disassembly only. | Johnny Chen |
| 2010-02-17 | Added RFE for disassembly only. | Johnny Chen |
| 2010-02-17 | Added BFI for disassembly only. | Johnny Chen |
| 2010-02-16 | Add SMC (Secure Monitor Call) system instruction for disassembly only. | Johnny Chen |
| 2010-02-16 | 80 column cleanup | Jim Grosbach |
| 2010-02-16 | Remove trailing whitespace | Jim Grosbach |
| 2010-02-16 | Update Thumb2 to not use CarryDefIsUnused or CarryDefIsUsed predicates, but | Jim Grosbach |
| 2010-02-16 | Remove redundant setting of Defs. CPSR is already marked by the block level s... | Jim Grosbach |
| 2010-02-16 | First step in eliminating the CarryDefIsUnused and CarryDefIsUsed predicates. | Jim Grosbach |
| 2010-02-16 | Added for disassembly the following instructions: | Johnny Chen |
