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2010-07-08Changes to ARM tail calls, mostly cosmetic.Dale Johannesen
Add explicit testcases for tail calls within the same module. Duplicate some code to humor those who think .w doesn't apply on ARM. Leave this disabled on Thumb1, and add some comments explaining why it's hard and won't gain much. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107851 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-07Split the SDValue out of OutputArg so that SelectionDAG-independentDan Gohman
code can do calling-convention queries. This obviates OutputArgReg. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107786 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-07Mark eh.sjlj.set/longjmp custom lowerings as Darwin-only since that's whereJim Grosbach
they've been tested to work. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107742 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-06By default, the eh.sjlj.setjmp/longjmp intrinsics should just do nothing ratherJim Grosbach
than assuming a target will custom lower them. Targets which do so should exlicitly mark them as having custom lowerings. PR7454. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107734 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-06Propagate debug loc.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107710 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-06Reapply r107655 with fixes; insert the pseudo instruction intoDan Gohman
the block before calling the expansion hook. And don't put EFLAGS in a mbb's live-in list twice. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107691 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-06Revert r107655.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107668 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-06Fix a bunch of custom-inserter functions to handle the case whereDan Gohman
the pseudo instruction is not at the end of the block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107655 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-03Remove isSS argument from CreateFixedObject. Fixed objects cannot be spill ↵Evan Cheng
slots so it's always false. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107550 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-01ARM function alignments were off by a power of two. svn 83242 changedBob Wilson
getFunctionAlignment and the corresponding use of that value in the ARM asm printer, but now we're using the standard asm printer. The result of this was that function alignments were dropped completely for Thumb functions. Radar 8143571. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107435 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-29Remove initialized but otherwise unused variables.Duncan Sands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107127 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-26Followup to r106770: actually generate SXTB and SXTH for sign-extensions.Eli Friedman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106940 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-26It's now possible to run code placement pass for ARM.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106935 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-25Change if-conversion block size limit checks to add some flexibility.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106901 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-25The hasMemory argument is irrelevant to how the argumentDale Johannesen
for an "i" constraint should get lowered; PR 6309. While this argument was passed around a lot, this is the only place it was used, so it goes away from a lot of other places. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106893 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-25Reduce indentation.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106819 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23Do not do tail calls to external symbols. If theDale Johannesen
branch turns out to be ARM-to-Thumb or vice versa the linker cannot resolve this. 8120438. If this optimization is going to be useful we probably need a compiler flag "assume callees are same architecture" or something like that. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106662 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23When using libcall expansions for the atomic intrinsics, the explicitJim Grosbach
MEMBARRIER fences aren't necessary for ARM. Tell the combiner to fold them away. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106631 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-21sign_extend_inreg needs to be expanded for pre-v6 Thumb as well as ARM.Bob Wilson
Radar 8104310. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106484 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-19Fix error message to match function name.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106381 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-19Disable sibcall optimization for Thumb1 for now since ↵Evan Cheng
Thumb1RegisterInfo::emitEpilogue is not expecting them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106368 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18back-end libcall handling for ATOMIC_SWAP (__sync_lock_test_and_set)Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106342 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18Enable Expand handling of atomics for subtargets that can't do them inline.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106336 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18Enable tail calls on ARM by default, with someDale Johannesen
basic tests. This has been well tested on Darwin but not elsewhere. It should work provided the linker correctly resolves B.W <label in other function> which it has not seen before, at least from llvm-based compilers. I'm leaving the arm-tail-calls switch in until I see if there's any problems because of that; it might need to be disabled for some environments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106299 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18Last round of changes for ARM tail calls.Dale Johannesen
Not turning them on yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106295 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18Treat the ARM inline asm {cc} constraint as a physreg (%CPSR), just like X86Jakob Stoklund Olesen
does for {flags}. If we create virtual registers of the CCR class, RegAllocFast may try to spill them, and we can't do that. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106289 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-17Thumb1 and any pre-v6 ARM target should use the libcall expansion ofJim Grosbach
ISD::MEMBARRIER. v7 and v7 ARM mode continue to use the custom lowering. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106204 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-17simplify code a bit and add a more explanatory assert for cases thatJim Grosbach
previously would result in 'cannot yet select' errors. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106199 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-16format and 80-column cleanupJim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106173 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-16Remove the hidden "neon-reg-sequence" option. The reg sequences are workingBob Wilson
now, so there's no need to disable them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106155 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-16Make post-ra scheduling, anti-dep breaking, and register scavenger ↵Evan Cheng
(conservatively) aware of predicated instructions. This enables ARM to move if-conversion before post-ra scheduler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106091 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-15Next round of tail call changes. Register used in a tailDale Johannesen
call must not be callee-saved; following x86, add a new regclass to represent this. Also fixes a couple of bugs. Still disabled by default; Thumb doesn't work yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106053 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-15Add basic support for NEON modified immediates besides VMOV.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106030 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-14Rename functions referring to VMOV immediates to refer to NEON "modifiedBob Wilson
immediate" operands. These functions have so far only been used for VMOV but they also apply to other NEON instructions with modified immediate operands. No functional changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105969 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-11Add a missing bitcast. This code used to only handle conversions betweenBob Wilson
i64 and f64 types, but now it also handle Neon vector types, so the f64 result of VMOVDRR may need to be converted to a Neon type. Radar 8084742. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105845 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-11Add instruction encoding for the Neon VMOV immediate instruction. This changesBob Wilson
the machine instruction representation of the immediate value to be encoded into an integer with similar fields as the actual VMOV instruction. This makes things easier for the disassembler, since it can just stuff the bits into the immediate operand, but harder for the asm printer since it has to decode the value to be printed. Testcase for the encoding will follow later when MC has more support for ARM. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105836 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-07Further changes for Neon vector shuffles:Bob Wilson
- change isShuffleMaskLegal to show that all shuffles with 32-bit and 64-bit elements are legal - the Neon shuffle instructions do not support 64-bit elements, but we were not checking for that before lowering shuffles to use them - remove some 64-bit element vduplane patterns that are no longer needed git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105586 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-05Improvements to tail call code. No functional effectDale Johannesen
unless using -arm-tail-calls. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105515 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-04More thoroughly disable tails calls by default.Dale Johannesen
8060143, although this doesn't fix the real problem with tail call. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105472 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-04For NEON vectors with 32- or 64-bit elements, select BUILD_VECTORs andBob Wilson
VECTOR_SHUFFLEs to REG_SEQUENCE instructions. The standard ISD::BUILD_VECTOR node corresponds closely to REG_SEQUENCE but I couldn't use it here because its operands do not get legalized. That is pretty awful, but I guess it makes sense for other targets. Instead, I have added an ARM-specific version of BUILD_VECTOR that will have its operands properly legalized. This fixes the rest of Radar 7872877. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105439 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-03Early implementation of tail call for ARM.Dale Johannesen
A temporary flag -arm-tail-calls defaults to off, so there is no functional change by default. Intrepid users may try this; simple cases work but there are bugs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105413 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-02Clean up 80 column violations. No functional change.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105350 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-28Schedule high latency instructions for latency reduction even if they are ↵Evan Cheng
not vfp / NEON instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105060 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-27Update the saved stack pointer in the sjlj function context following eitherJim Grosbach
an alloca() or an llvm.stackrestore(). rdar://8031573 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104900 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-27back out 104862/104869. Can reuse stacksave after all. Very cool.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104897 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-27add ISD::STACKADDR to get the current stack pointer. Will be used by sjlj EHJim Grosbach
to update the jmpbuf in the presence of VLAs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104862 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26Adjust eh.sjlj.setjmp to properly have a chain and to have an opcode entry inJim Grosbach
ISD::. No functional change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104734 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-25Clean up indentation.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104580 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-24LR is in GPR, not tGPR even in Thumb1 mode.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104518 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-23VDUP doesn't support vectors with 64-bit elements.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104455 91177308-0d34-0410-b5e6-96231b3b80d8
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