| Age | Commit message (Expand) | Author |
|---|
| 2012-03-27 | Remove unnecessary llvm:: qualifications | Craig Topper |
| 2012-03-26 | Prune includes and replace uses of ARMRegisterInfo.h with ARMBaeRegisterInfo.h | Craig Topper |
| 2012-03-11 | Use uint16_t to store registers and opcode in static tables in the target spe... | Craig Topper |
| 2012-03-06 | ARM refactor more NEON VLD/VST instructions to use composite physregs | Jim Grosbach |
| 2012-03-05 | ARM refactor away a bunch of VLD/VST pseudo instructions. | Jim Grosbach |
| 2012-02-18 | Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,... | Jia Liu |
| 2012-01-20 | More dead code removal (using -Wunreachable-code) | David Blaikie |
| 2012-01-10 | ARM updating VST2 pseudo-lowering fixed vs. register update. | Jim Grosbach |
| 2011-12-22 | Add variants of the dispatchsetup pseudo for Thumb and !VFP. <rdar://10620138> | Bob Wilson |
| 2011-12-21 | ARM NEON assmebly parsing for VLD2 to all lanes instructions. | Jim Grosbach |
| 2011-12-21 | ARM NEON VLD2 assembly parsing for structure to all lanes, non-writeback. | Jim Grosbach |
| 2011-12-17 | Preserve more memory operands in ARMExpandPseudo. | Jakob Stoklund Olesen |
| 2011-12-15 | ARM NEON VTBL/VTBX assembly parsing and encoding. | Jim Grosbach |
| 2011-12-14 | ARM NEON refactor VST2 w/ writeback instructions. | Jim Grosbach |
| 2011-12-14 | ARM NEON VST2 assembly parsing and encoding. | Jim Grosbach |
| 2011-12-09 | ARM assembly parsing and encoding for VLD2 with writeback. | Jim Grosbach |
| 2011-11-30 | ARM parsing for VLD1 all lanes, with writeback. | Jim Grosbach |
| 2011-11-30 | ARM parsing for VLD1 two register all lanes, no writeback. | Jim Grosbach |
| 2011-11-29 | ARM assembly parsing and encoding for four-register VST1. | Jim Grosbach |
| 2011-11-29 | ARM assembly parsing and encoding for three-register VST1. | Jim Grosbach |
| 2011-11-16 | Fix ARM SjLj-EH dispatch setup code. <rdar://problem/10444602> | Bob Wilson |
| 2011-11-12 | Re-apply 144430, this time with the associated isel and disassmbler bits. | Jim Grosbach |
| 2011-10-31 | ARM VST1 w/ writeback assembly parsing and encoding. | Jim Grosbach |
| 2011-10-31 | ARM writeback vs. stride operands for VST/VLD. | Jim Grosbach |
| 2011-10-24 | Nuke dead code. Nothing generates the VLD1d64QPseudo_UPD instruction. | Jim Grosbach |
| 2011-10-24 | ARM assembly parsing and encoding for VLD1 w/ writeback. | Jim Grosbach |
| 2011-10-24 | ARM refactor am6offset usage for VLD1. | Jim Grosbach |
| 2011-10-21 | Assembly parsing for 4-register sequential variant of VLD2. | Jim Grosbach |
| 2011-10-21 | Assembly parsing for 2-register sequential variant of VLD2. | Jim Grosbach |
| 2011-10-21 | Assembly parsing for 4-register variant of VLD1. | Jim Grosbach |
| 2011-10-21 | Assembly parsing for 3-register variant of VLD1. | Jim Grosbach |
| 2011-10-21 | ARM VLD parsing and encoding. | Jim Grosbach |
| 2011-09-02 | Tidy up. Formatting. | Jim Grosbach |
| 2011-08-20 | Remove the VMOVQQ pseudo instruction. | Chad Rosier |
| 2011-08-20 | VMOVQQQQs pseudo instructions are only created by ARMBaseInstrInfo::copyPhysReg. | Chad Rosier |
| 2011-08-19 | Make a bunch of symbols private. | Benjamin Kramer |
| 2011-08-13 | Expand VMOVQQQQ pseudo instructions. | Bob Wilson |
| 2011-07-29 | Add -verify-arm-pseudo-expand. | Jakob Stoklund Olesen |
| 2011-07-21 | Get rid of the extraneous GPR operand on so_reg_imm operands, which in turn n... | Owen Anderson |
| 2011-07-21 | Split up the ARM so_reg ComplexPattern into so_reg_reg and so_reg_imm, allowi... | Owen Anderson |
| 2011-07-20 | Sink ARMMCExpr and ARMAddressingModes into MC layer. First step to separate A... | Evan Cheng |
| 2011-07-15 | Remove VMOVDneon and VMOVQ, which are just aliases for VORR. This continues ... | Owen Anderson |
| 2011-07-13 | 80 columns. | Jim Grosbach |
| 2011-07-01 | Pseudo-ize t2MOVCC[ri]. | Jim Grosbach |
| 2011-06-30 | Pseudo-ize the Thumb tTPsoft instruction. | Jim Grosbach |
| 2011-06-28 | - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and | Evan Cheng |
| 2011-04-29 | use the MachineInstrBuilder operator-> to simplify some code. | Chris Lattner |
| 2011-04-19 | Do not lose mem_operands while lowering VLD / VST intrinsics. | Evan Cheng |
| 2011-04-05 | Fix bugs in the pseuo-ization of ADCS/SBCS pointed out by Jim, as well as doi... | Owen Anderson |
| 2011-04-05 | Convert ADCS and SBCS instructions into pseudos that are expanded to the ADC/... | Owen Anderson |
