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AgeCommit message (Expand)Author
2010-05-25Do one map lookup instead of two.Dan Gohman
2010-05-25Move the verbose asm output up a bit so it can be used in the special casesEric Christopher
2010-05-25Okay, bear with me here...Bill Wendling
2010-05-25Add support for initialized global data for darwin tls. Update commentsEric Christopher
2010-05-25Print symbolic SubRegIndex names on machine operands.Jakob Stoklund Olesen
2010-05-25Fix another variant of PR 7191. Also add a testcaseDale Johannesen
2010-05-25Fix PR 7191. I have been unable to create a .ll file that fails, sorry.Dale Johannesen
2010-05-25Disable invalid coalescer assertion.Jakob Stoklund Olesen
2010-05-24Print out the name of the function during SSC.Bill Wendling
2010-05-24Avoid adding duplicate function live-in's.Evan Cheng
2010-05-24Do not emit line number entries for unknown debug values.Devang Patel
2010-05-24Encode the Caml frametable by following what the comment says: the number of ...Nicolas Geoffray
2010-05-23MC: Add an MCLoggingStreamer, for use in debugging integrated-as mismatches.Daniel Dunbar
2010-05-22Implement @llvm.returnaddress. rdar://8015977.Evan Cheng
2010-05-22Implement eh.sjlj.longjmp for ARM. Clean up the intrinsic a bit.Jim Grosbach
2010-05-22Add full bss data support for darwin tls variables.Eric Christopher
2010-05-22Collect variable information during endFunction() instead of beginFunction().Devang Patel
2010-05-21Clean up extra whitespace.Bob Wilson
2010-05-21Make this LookAheadLimit, not the uninitialized LookAheadLeft.Eric Christopher
2010-05-21Allow machine cse to cse instructions which define physical registers. Contro...Evan Cheng
2010-05-21Change CodeGen/ARM/2009-11-02-NegativeLane.ll to use 16-bit vector elementsBob Wilson
2010-05-21- Change MachineInstr::findRegisterDefOperandIdx so it can also look for defsEvan Cheng
2010-05-21Add MachineInstr::readsWritesVirtualRegister() to determine if an instructionJakob Stoklund Olesen
2010-05-21SimplifyDevang Patel
2010-05-21constify accessor.Chris Lattner
2010-05-21Revert "Use MachineInstr::readsWritesVirtualRegister to determine if a regist...Jakob Stoklund Olesen
2010-05-21Use MachineInstr::readsWritesVirtualRegister to determine if a register is read.Jakob Stoklund Olesen
2010-05-21Teach VirtRegRewriter to handle spilling in instructions that have multipleJakob Stoklund Olesen
2010-05-21If the first definition of a virtual register is a partial redef, add anJakob Stoklund Olesen
2010-05-21Rename -pre-RA-sched=hybrid to -pre-RA-sched=list-hybrid.Evan Cheng
2010-05-21Simplify.Devang Patel
2010-05-20Allow targets more controls on what nodes are scheduled by reg pressure, what...Evan Cheng
2010-05-20Refactor.Devang Patel
2010-05-20Remove dbg_value workaround and associated command line optionJim Grosbach
2010-05-20Split DbgVariable. Eventually, variable info will be communicated through fra...Devang Patel
2010-05-20Add a hybrid bottom up scheduler that reduce register usage while avoidingEvan Cheng
2010-05-20Fix typo in comment.Nick Lewycky
2010-05-20Partial code for emitting thread local bss data.Eric Christopher
2010-05-19Optimize away insertelement of an undef value. This shows up inBob Wilson
2010-05-19Enable preserving debug information through post-RA schedulingJim Grosbach
2010-05-19Fix the post-RA instruction scheduler to handle instructions referenced byJim Grosbach
2010-05-19Code clean up.Evan Cheng
2010-05-19Revert r104165.Devang Patel
2010-05-19Add support for partial redefs to the fast register allocator.Jakob Stoklund Olesen
2010-05-19There is no need to maintain InsnsBeginScopeSet separately. Devang Patel
2010-05-19Add MachineInstr::readsVirtualRegister() in preparation for proper handling ofJakob Stoklund Olesen
2010-05-19Code refactoring: pull SchedPreference enum from TargetLowering.h to TargetMa...Evan Cheng
2010-05-19TwoAddressInstructionPass doesn't really know how to merge live intervals whenJakob Stoklund Olesen
2010-05-19When expanding a vector_shuffle, the element type may not be legal and mayBob Wilson
2010-05-19Intrinsics which do a vector compare (results are all zero or all ones) are m...Evan Cheng
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