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Author
2012-03-16
ScheduleDAGInstrs: When adding uses we add them into a set that's empty at th...
Benjamin Kramer
2012-03-16
Limit the number of memory operands in MachineInstr to 2^16 and store the num...
Benjamin Kramer
2012-03-16
CriticalAntiDepBreaker: BasicBlock::size is an expensive operation, reuse the...
Benjamin Kramer
2012-03-16
misched: add DAG edges from vreg defs to ExitSU.
Andrew Trick
2012-03-16
Revert r152705, which reapplied r152486 as this appears to be causing failures
Chad Rosier
2012-03-16
Revert r152613 (and r152614), "Inline the d'tor and add an anchor instead." f...
NAKAMURA Takumi
2012-03-15
For types with a parent of the compile unit make sure and emit
Eric Christopher
2012-03-15
We actually handle AllocaInst via getRegForValue below just fine.
Eric Christopher
2012-03-15
Add some debugging output into fast isel as well.
Eric Christopher
2012-03-15
Add another debug statement.
Eric Christopher
2012-03-15
Tabs.
Eric Christopher
2012-03-15
Typo.
Eric Christopher
2012-03-15
When optimizing certain BUILD_VECTOR nodes into other BUILD_VECTOR nodes, add...
Nadav Rotem
2012-03-15
Revert the removal of DW_AT_MIPS_linkage_name when we aren't putting
Eric Christopher
2012-03-15
Add a xform to the DAG combiner.
Bill Wendling
2012-03-14
Silence operator precedence warnings.
Benjamin Kramer
2012-03-14
Reapply r152486 with a fix for the nightly testers.
Bill Wendling
2012-03-14
Insert the debugging instructions in one fell-swoop so that it doesn't call the
Bill Wendling
2012-03-14
misched: implemented a framework for top-down or bottom-up scheduling.
Andrew Trick
2012-03-14
misched comments
Andrew Trick
2012-03-14
Remove the DW_AT_MIPS_linkage name attribute when we don't need it
Eric Christopher
2012-03-13
Fortify r152675 a bit. Although I'm not able to come up with a test case that...
Evan Cheng
2012-03-13
DAG combine incorrectly optimize (i32 vextract (v4i16 load $addr), c) to
Evan Cheng
2012-03-13
s/SjLjEHPass/SjLjEHPrepare/
Bill Wendling
2012-03-13
Add a return type.
Bill Wendling
2012-03-13
Inline the d'tor and add an anchor instead.
Bill Wendling
2012-03-13
Refactor the SelectionDAG's 'dump' methods into their own .cpp file.
Bill Wendling
2012-03-13
Fixed typo in comment.
Lang Hames
2012-03-12
Revert due to nightly test failures.
Bill Wendling
2012-03-11
DwarfDebug: Store the filename/dirname pair as a zero-separated string in a s...
Benjamin Kramer
2012-03-11
llvm::SwitchInst
Stepan Dyatkovskiy
2012-03-10
Microoptimize getVRegDef. def_begin isn't free, don't compute it twice.
Benjamin Kramer
2012-03-10
Implement a more intelligent way of spilling uses across an invoke boundary.
Bill Wendling
2012-03-10
Report the defining instruction.
Jakob Stoklund Olesen
2012-03-10
Add SSA verification to MachineVerifier.
Jakob Stoklund Olesen
2012-03-10
Use SmallPtrSet instead of DenseSet.
Jakob Stoklund Olesen
2012-03-10
Give dagcombiner's worklist some inline capacity.
Benjamin Kramer
2012-03-09
Assert on SSA errors in LiveVariables.
Jakob Stoklund Olesen
2012-03-09
misched: handle scheduler that insert instructions at empty region boundaries.
Andrew Trick
2012-03-09
misched: handle scheduling region boundaries nicely.
Andrew Trick
2012-03-09
misched interface: rename Begin/End to RegionBegin/RegionEnd since they are n...
Andrew Trick
2012-03-09
misched comments
Andrew Trick
2012-03-09
revert 152356: verify misched changes using -misched=shuffle.
Andrew Trick
2012-03-09
misched: allow the default scheduler to be one chosen by the target.
Andrew Trick
2012-03-09
Cache MBB->begin. It's possible the scheduler / bundler may change MBB->begin().
Evan Cheng
2012-03-08
Use uint16_t to store instruction implicit uses and defs. Reduces static data.
Craig Topper
2012-03-08
Taken into account Duncan's comments for r149481 dated by 2nd Feb 2012:
Stepan Dyatkovskiy
2012-03-08
misched interface: Expose the MachineScheduler pass.
Andrew Trick
2012-03-07
Cleanup VLIWPacketizer to use the updated ScheduleDAGInstrs interface.
Andrew Trick
2012-03-07
misched prep: Expose the ScheduleDAGInstrs interface so targets may
Andrew Trick
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