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Replace the REM instruction with UREM, SREM and FREM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31369 91177308-0d34-0410-b5e6-96231b3b80d8
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no fixes physreg. Treat this as permission to use any register in the register
class. When this happens and it is safe, allow the llvm register allcoator to
allocate the register instead of doing it at isel time. This eliminates a ton
of copies around common inline asms. For example:
int test2(int Y, int X) {
asm("foo %0, %1" : "=r"(X): "r"(X));
return X;
}
now compiles to:
_test2:
foo r3, r4
blr
instead of:
_test2:
mr r2, r4
foo r2, r2
mr r3, r2
blr
GCC produces:
_test2:
foo r4, r4
mr r3,r4
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31366 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31364 91177308-0d34-0410-b5e6-96231b3b80d8
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dest / src operands can be tied together.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31363 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31359 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31356 91177308-0d34-0410-b5e6-96231b3b80d8
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it inserts an uncond branch where it is less likely to cause a problem. This
fixes some perf issues on ppc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31354 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31347 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31340 91177308-0d34-0410-b5e6-96231b3b80d8
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tail is not an entire block for either of them, pick one, split it, then
merge the common part.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31336 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31335 91177308-0d34-0410-b5e6-96231b3b80d8
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_intcoord_cond_next55:
LBB1_3: ;cond_next55
lis r2, ha16(LCPI1_0)
lfs f0, lo16(LCPI1_0)(r2)
fcmpu cr0, f1, f0
blt cr0, LBB1_2 ;cond_next62.exitStub
LBB1_1: ;bb72.exitStub
li r3, 1
blr
LBB1_2: ;cond_next62.exitStub
li r3, 0
blr
instead of:
_intcoord_cond_next55:
LBB1_3: ;cond_next55
lis r2, ha16(LCPI1_0)
lfs f0, lo16(LCPI1_0)(r2)
fcmpu cr0, f1, f0
bge cr0, LBB1_1 ;bb72.exitStub
LBB1_4: ;cond_next55
lis r2, ha16(LCPI1_0)
lfs f0, lo16(LCPI1_0)(r2)
fcmpu cr0, f1, f0
bnu cr0, LBB1_2 ;cond_next62.exitStub
LBB1_1: ;bb72.exitStub
li r3, 1
blr
LBB1_2: ;cond_next62.exitStub
li r3, 0
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31330 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31328 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31323 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31319 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31318 91177308-0d34-0410-b5e6-96231b3b80d8
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2. Added partial debug support for mingw\cygwin targets (the same as
Linux\ELF). Please note, that currently mingw\cygwin uses 'stabs' format
for storing debug info by default, thus many (runtime) libraries has
this information included. These formats shouldn't be mixed in one binary
('stabs' & 'DWARF'), otherwise binutils tools will be confused.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31311 91177308-0d34-0410-b5e6-96231b3b80d8
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we don't support a specific constraint yet. When this happens, print the
unsupported constraint.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31310 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31305 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31302 91177308-0d34-0410-b5e6-96231b3b80d8
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generated object modules to be debugged with gdb. Hopefully this helps
pre-release debugging.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31299 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31296 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31295 91177308-0d34-0410-b5e6-96231b3b80d8
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target custom lower it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31293 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31292 91177308-0d34-0410-b5e6-96231b3b80d8
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successors), and make island block movement more general.
This compiles CodeGen/X86/2006-04-27-ISelFoldingBug.ll to:
_loadAndRLEsource_no_exit_2E_1_label_2E_0:
subl $8, %esp
movl %esi, 4(%esp)
movl %ebx, (%esp)
movl 16(%esp), %eax
movl 12(%esp), %ecx
LBB1_3: #label.0
movl _last, %edx
movl %edx, %esi
incl %esi
movl %esi, _last
movl %ecx, %ebx
# TRUNCATE movb %bl, %bl
movl _block, %esi
movb %bl, 1(%esi,%edx)
cmpl %eax, _last
jge LBB1_2 #codeRepl5.exitStub
LBB1_4: #label.0
cmpl $257, %ecx
je LBB1_2 #codeRepl5.exitStub
LBB1_1: #label.0.no_exit.1_crit_edge.exitStub
movl $1, %eax
movl (%esp), %ebx
movl 4(%esp), %esi
addl $8, %esp
ret
LBB1_2: #codeRepl5.exitStub
xorl %eax, %eax
movl (%esp), %ebx
movl 4(%esp), %esi
addl $8, %esp
ret
instead of:
_loadAndRLEsource_no_exit_2E_1_label_2E_0:
subl $8, %esp
movl %esi, 4(%esp)
movl %ebx, (%esp)
movl 16(%esp), %eax
movl 12(%esp), %ecx
jmp LBB1_3 #label.0
LBB1_1: #label.0.no_exit.1_crit_edge.exitStub
movl $1, %eax
movl (%esp), %ebx
movl 4(%esp), %esi
addl $8, %esp
ret
LBB1_2: #codeRepl5.exitStub
xorl %eax, %eax
movl (%esp), %ebx
movl 4(%esp), %esi
addl $8, %esp
ret
LBB1_3: #label.0
movl _last, %edx
movl %edx, %esi
incl %esi
movl %esi, _last
movl %ecx, %ebx
# TRUNCATE movb %bl, %bl
movl _block, %esi
movb %bl, 1(%esi,%edx)
cmpl %eax, _last
jge LBB1_2 #codeRepl5.exitStub
LBB1_4: #label.0
cmpl $257, %ecx
jne LBB1_1 #label.0.no_exit.1_crit_edge.exitStub
jmp LBB1_2 #codeRepl5.exitStub
... which is much better layout :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31282 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31281 91177308-0d34-0410-b5e6-96231b3b80d8
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used by comparisons in the main block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31279 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31276 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31275 91177308-0d34-0410-b5e6-96231b3b80d8
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edges whose destinations are not phi nodes don't bother us. Also, share
split edges, since the split edge can't have a phi. This significantly
reduces the complexity of generated code in some cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31274 91177308-0d34-0410-b5e6-96231b3b80d8
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jump tables that are dead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31273 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31269 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31267 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31266 91177308-0d34-0410-b5e6-96231b3b80d8
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the pred block doesn't fall through into them if it's a jumptable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31263 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31261 91177308-0d34-0410-b5e6-96231b3b80d8
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being inserted on unsplit critical edges, which introduces (sometimes large
amounts of) partially dead spill code.
This also fixes PR925 + CodeGen/Generic/switch-crit-edge-constant.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31260 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31254 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31243 91177308-0d34-0410-b5e6-96231b3b80d8
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(CodeGen/Generic/2006-10-27-CondFolding.ll).
Add many fewer CFG edges and PHI node entries. If there is a switch which has
the same block as multiple destinations, only add that block once as a successor/phi
node (in the jumptable case)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31242 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31240 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31233 91177308-0d34-0410-b5e6-96231b3b80d8
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PowerPC/and-branch.ll to:
cmpwi cr0, r4, 4
bgt cr0, LBB1_2 ;UnifiedReturnBlock
LBB1_3: ;entry
cmplwi cr0, r3, 0
bne cr0, LBB1_2 ;UnifiedReturnBlock
instead of:
cmpwi cr7, r4, 4
mfcr r2
addic r4, r3, -1
subfe r3, r4, r3
rlwinm r2, r2, 30, 31, 31
or r2, r2, r3
cmplwi cr0, r2, 0
bne cr0, LBB1_2 ;UnifiedReturnBlock
LBB1_1: ;cond_true
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31232 91177308-0d34-0410-b5e6-96231b3b80d8
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This compiles Regression/CodeGen/X86/or-branch.ll into:
_foo:
subl $12, %esp
call L_bar$stub
movl 20(%esp), %eax
movl 16(%esp), %ecx
cmpl $5, %eax
jl LBB1_1 #cond_true
LBB1_3: #entry
testl %ecx, %ecx
jne LBB1_2 #UnifiedReturnBlock
LBB1_1: #cond_true
call L_bar$stub
addl $12, %esp
ret
LBB1_2: #UnifiedReturnBlock
addl $12, %esp
ret
instead of:
_foo:
subl $12, %esp
call L_bar$stub
movl 20(%esp), %eax
movl 16(%esp), %ecx
cmpl $4, %eax
setg %al
testl %ecx, %ecx
setne %cl
testb %cl, %al
jne LBB1_2 #UnifiedReturnBlock
LBB1_1: #cond_true
call L_bar$stub
addl $12, %esp
ret
LBB1_2: #UnifiedReturnBlock
addl $12, %esp
ret
And on ppc to:
cmpwi cr0, r29, 5
blt cr0, LBB1_1 ;cond_true
LBB1_3: ;entry
cmplwi cr0, r30, 0
bne cr0, LBB1_2 ;UnifiedReturnBlock
instead of:
cmpwi cr7, r4, 4
mfcr r2
addic r4, r3, -1
subfe r30, r4, r3
rlwinm r29, r2, 30, 31, 31
and r2, r29, r30
cmplwi cr0, r2, 0
bne cr0, LBB1_2 ;UnifiedReturnBlock
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31230 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31209 91177308-0d34-0410-b5e6-96231b3b80d8
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Make necessary changes to support DIV -> [SUF]Div. This changes llvm to
have three division instructions: signed, unsigned, floating point. The
bytecode and assembler are bacwards compatible, however.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31195 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31188 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31180 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31179 91177308-0d34-0410-b5e6-96231b3b80d8
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