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2012-03-05Make MCRegisterInfo available to the the MCInstPrinter.Jim Grosbach
Used to allow context sensitive printing of super-register or sub-register references. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152043 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-05Fix warnings about adding a bool to a string.Bill Wendling
Patch by Sean Silva! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152042 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-05Convert more GenRegisterInfo tables from unsigned to uint16_t to reduce ↵Craig Topper
static data size. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152016 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-04Stop fixing bad machine code in LiveIntervalAnalysis.Jakob Stoklund Olesen
The first def of a virtual register cannot also read the register. Assert on such bad machine code instead of trying to fix it. TwoAddressInstructionPass should never create code like that. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152010 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-04Stop adding <imp-def> operands when coalescing sub-registers.Jakob Stoklund Olesen
We are already setting <undef> flags, and that is good enough. The <imp-def> operands don't mean anything any more. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152009 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-04Use uint16_t to store register overlaps to reduce static data.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152001 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-04Use uint16_t instead of unsigned to store registers in reg classes. Reduces ↵Craig Topper
static data size. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151998 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-04Use uint16_t to store registers in callee saved register tables to reduce ↵Craig Topper
size of static data. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151996 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-02Grammar-o in function name.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151875 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-02Grammar.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151874 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-02If the linkage name doesn't exist we're supposed to emit a referenceEric Christopher
to the string table for the function name, not the function name. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151873 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-02Revert "Reorder the sections being output to reduce the number of assembler"Eric Christopher
The inline table needs to be constructed ahead of time so that it doesn't try to create new strings while we're emitting everything. This reverts commit a8ff9bccb399183cdd5f1c3cec2bda763664b4b0. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151864 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-01Reorder the sections being output to reduce the number of assemblerEric Christopher
fixups that are being used to determine section offsets. Reduces the total number of fixups by 50% for a non-trivial testcase. Part of rdar://10413936 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151852 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-01Minimal changes for LLVM to compile under VS11.Michael J. Spencer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151849 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-01Fix a codegen fault in which log2 or exp2 could be dead-code eliminated even ↵James Molloy
though they could have sideeffects. Only allow log2/exp2 to be converted to an intrinsic if they are declared "readnone". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151807 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-01Make InlineSpiller bundle-aware.Jakob Stoklund Olesen
Simply treat bundles as instructions. Spill code is inserted between bundles, never inside a bundle. Rewrite all operands in a bundle at once. Don't attempt and memory operand folding inside bundles. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151787 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-01Move getBundleStart() into MachineInstrBundle.h.Jakob Stoklund Olesen
This allows the function to be inlined, and makes it suitable for use in getInstructionIndex(). Also provide a const version. C++ is great for touch typing practice. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151782 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-01Don't redundantly copy implicit operands when rematerializing.Lang Hames
While we're at it - don't copy vreg implicit operands while rematerializing. This fixes PR12138. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151779 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-29LegalizeIntegerTypes: Reorder operations in the "big shift by small amount" ↵Benjamin Kramer
optimization, making the lives of later passes easier. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151722 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-29Add an analyzeVirtReg() function.Jakob Stoklund Olesen
This function does more or less the same as MI::readsWritesVirtualRegister(), but it supports bundles as well. It also determines if any constraint requires reading and writing operands to use the same register. Most clients want to know. Use the more modern MO.readsReg() instead of trying to sort out undefs and partial redefines. Stop supporting the extra full <imp-def> operand as an alternative to <def,undef> sub-register defines. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151690 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-29Move the operand iterator into MachineInstrBundle.h where it belongs.Jakob Stoklund Olesen
Extract a base class and provide four specific sub-classes for iterating over const/non-const bundles/instructions. This eliminates the mystery bool constructor argument. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151684 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-28Kill off LiveRangeEdit::getNewVRegs and LiveRangeEdit::getUselessVRegs. TheseLang Hames
methods are no longer needed now that LinearScan has gone away. (Contains tweaks trivialSpillEverywhere to enable the removal of getNewVRegs). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151658 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-28Re-commit r151623 with fix. Only issue special no-return calls if it's a ↵Evan Cheng
direct call. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151645 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-28Fix off-by one in comment.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151644 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-28LegalizeIntegerTypes: Reenable the large shift with small amount optimization.Benjamin Kramer
To avoid problems with zero shifts when getting the bits that move between words we use a trick: first shift the by amount-1, then do another shift by one. When amount is 0 (and size 32) we first shift by 31, then by one, instead of by 32. Also fix a latent bug that emitted the low and high words in the wrong order when shifting right. Fixes PR12113. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151637 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-28Revert r151623 "Some ARM implementaions, e.g. A-series, does return stack ↵Daniel Dunbar
prediction. ...", it is breaking the Clang build during the Compiler-RT part. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151630 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-28Code cleanup following CR by Duncan.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151627 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-28Fix a bug in the code that builds SDNodes from vector GEPs.Nadav Rotem
When the GEP index is a vector of pointers, the code that calculated the size of the element started from the vector type, and not the contained pointer type. As a result, instead of looking at the data element pointed by the vector, this code used the size of the vector. This works for 32bit members (on 32bit systems), but not for other types. Added code to peel the vector type and added a test. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151626 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-28Some ARM implementaions, e.g. A-series, does return stack prediction. That is,Evan Cheng
the processor keeps a return addresses stack (RAS) which stores the address and the instruction execution state of the instruction after a function-call type branch instruction. Calling a "noreturn" function with normal call instructions (e.g. bl) can corrupt RAS and causes 100% return misprediction so LLVM should use a unconditional branch instead. i.e. mov lr, pc b _foo The "mov lr, pc" is issued in order to get proper backtrace. rdar://8979299 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151623 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-28Handle regmasks in MachineCSE.Jakob Stoklund Olesen
Don't attempt to extend physreg live ranges across calls. <rdar://problem/10942095> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151610 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-28Handle regmasks in the machine code verifier.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151607 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-28Fix 80-column violation.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151599 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-27Fix for PR12090: clear def maps of aliases when visiting a copy. e.g.Evan Cheng
%S5<def> = COPY %S0<kill> First clear def map of Q1, etc. No small test case available. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151574 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-27Update machine code verifier.Jakob Stoklund Olesen
After the SlotIndex slot names were updated, it is possible to apply stricter checks to live intervals. Also treat bundles as bags of operands when checking live intervals. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151531 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-25Make the peephole optimizer clear kill flags on a vreg if it's about to add newLang Hames
uses of the vreg, since the old kills may no longer be valid. This was causing -verify-machineinstrs to complain about uses after kills, and could potentially have been causing subtle register allocation issues, but I haven't come across a test case yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151425 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-25Fixed typo.Lang Hames
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151417 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-24Add missing staticJakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151396 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-24Add a -stress-regalloc=<N> option.Jakob Stoklund Olesen
This will limit all register classes to N registers in order to stress test register allocation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151379 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-24Don't crash when a glue node contains an internal CopyToRegHal Finkel
This is necessary to support the existing ppc lowering code for indirect calls. Fixes PR12071. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151373 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-24SDAGBuilder: Remove register sets that were never read and prune dead code ↵Benjamin Kramer
surrounding it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151364 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-24ScheduleDAGInstrs.h:155: warning: suggest parentheses around `&&' within `||'.Nick Lewycky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151355 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-24PostRA sched: speed up physreg tracking by not abusing SparseSet.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151348 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-24Turn avx insert intrinsic calls into INSERT_SUBVECTOR DAG nodes and remove ↵Pete Cooper
duplicate patterns for selecting the intrinsics git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151342 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-24If the Address of a variable is an argument then treat the entireEric Christopher
variable declaration as an argument because we want that address anyhow for our debug information. This seems to fix rdar://9965111, at least we have more debug information than before and from reading the assembly it appears to be the correct location. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151335 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-24Tabs, formatting and long lines oh my!Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151334 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-23Allow an integer to be converted into an MMX type when it's used in an inlineBill Wendling
asm. <rdar://problem/10106006> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151303 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-23BitVectorize loop.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151274 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-23post-ra-sched: Turn the KillIndices vector into a bitvector, it only stored ↵Benjamin Kramer
two meaningful states. Rename it to LiveRegs to make it more clear what's stored inside. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151273 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-23post-ra-sched: Replace a std::set of regs with a bitvector.Benjamin Kramer
Assuming that a single std::set node adds 3 control words, a bitvector can store (3*8+4)*8=224 registers in the allocated memory of a single element in the std::set (x86_64). Also we don't have to call malloc for every register added. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151269 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-23Make calls scheduling boundaries post-ra.Jakob Stoklund Olesen
Before register allocation, instructions can be moved across calls in order to reduce register pressure. After register allocation, we don't gain a lot by moving callee-saved defs across calls. In fact, since the scheduler doesn't have a good idea how registers are used in the callee, it can't really make good scheduling decisions. This changes the schedule in two ways: 1. Latencies to call uses and defs are no longer accounted for, causing some random shuffling around calls. This isn't really a problem since those uses and defs are inaccurate proxies for what happens inside the callee. They don't represent registers used by the call instruction itself. 2. Instructions are no longer moved across calls. This didn't happen very often, and the scheduling decision was made on dubious information anyway. As with any scheduling change, benchmark numbers shift around a bit, but there is no positive or negative trend from this change. This makes the post-ra scheduler 5% faster for ARM targets. The secret motivation for this patch is the introduction of register mask operands representing call clobbers. The most efficient way of handling regmasks in ScheduleDAGInstrs is to model them as barriers for physreg live ranges, but not for virtreg live ranges. That's fine pre-ra, but post-ra it would have the same effect as this patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151265 91177308-0d34-0410-b5e6-96231b3b80d8
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