| Age | Commit message (Expand) | Author |
|---|
| 2012-07-07 | I'm introducing a new machine model to simultaneously allow simple | Andrew Trick |
| 2012-07-06 | Whitespace. | Chad Rosier |
| 2012-07-06 | [fast-isel] Tell fast-isel to do nothing with the new donothing intrinsic. | Chad Rosier |
| 2012-07-06 | Fix PR13202 and a regtest. | Alexey Samsonov |
| 2012-07-06 | Add some comments suggested in code review. | Jakob Stoklund Olesen |
| 2012-07-05 | Optimize extendIntervalEndTo a tiny bit by saving one call through the | Chandler Carruth |
| 2012-07-05 | Finish fixing the MachineOperand hashing, providing a nice modern | Chandler Carruth |
| 2012-07-05 | All cases are covered, no need for a default. This deals with the | Duncan Sands |
| 2012-07-05 | The hash function for MI expressions, used by MachineCSE, is really | Chandler Carruth |
| 2012-07-05 | Use the right kind of booleans: we were emitting 0/1 booleans, instead of 0/-1 | Duncan Sands |
| 2012-07-05 | Remove ParentMap. You can just ask the domnode for its parent. No functionality | Nick Lewycky |
| 2012-07-04 | Allow trailing physreg RegisterSDNode operands on non-variadic instructions. | Jakob Stoklund Olesen |
| 2012-07-04 | Print SlotIndexes when available for -print-machineinstrs. | Jakob Stoklund Olesen |
| 2012-07-04 | Allow multiple terminators to read virtual registers. | Jakob Stoklund Olesen |
| 2012-07-04 | Make sure -print-machineinstrs applies to the first pass as well. | Jakob Stoklund Olesen |
| 2012-07-04 | Reverted r156659, due to probable performance regressions, DenseMap should be... | Stepan Dyatkovskiy |
| 2012-07-04 | Reduce some code duplication. | Eric Christopher |
| 2012-07-04 | Fix some ascii art in a comment to not have trailing backslashes (inspiration | Matt Beaumont-Gay |
| 2012-07-04 | Add an experimental early if-conversion pass, off by default. | Jakob Stoklund Olesen |
| 2012-07-03 | Part of r159527. Splitted into series of patches and gone with fixed PR13256: | Stepan Dyatkovskiy |
| 2012-07-02 | Revert "IntRange:" as it appears to be breaking self hosting. | Eric Christopher |
| 2012-07-02 | All glory to address sanitizer. ;] | Chandler Carruth |
| 2012-07-02 | Target option DisableJumpTables is a gross hack. Move it to TargetLowering in... | Evan Cheng |
| 2012-07-02 | misched: allow NULL InstrItineraries. | Andrew Trick |
| 2012-07-02 | Turn an assert into an error to make it a bit more friendly. | Eric Christopher |
| 2012-07-02 | Extend TargetPassConfig to allow running only a subset of the normal passes. | Bob Wilson |
| 2012-07-02 | Move assertion with TargetPassConfig's Initialized flag. | Bob Wilson |
| 2012-07-02 | Consistently use AnalysisID types in TargetPassConfig. | Bob Wilson |
| 2012-07-02 | Add all codegen passes to the PassManager via TargetPassConfig. | Bob Wilson |
| 2012-07-02 | Added assertion in getVRegDef of MachineRegisterInfo to make sure the virtual | Manman Ren |
| 2012-07-02 | Reapply "Make NumMicroOps a variable in the subtarget's instruction itinerary." | Andrew Trick |
| 2012-07-02 | IntRange: | Stepan Dyatkovskiy |
| 2012-07-01 | Now that RegistersDefinedFromSameValue handles one instruction being an | Rafael Espindola |
| 2012-06-30 | Handle implicit_defs in the register coalescer. I am still trying to produce | Rafael Espindola |
| 2012-06-29 | Add SrcReg2 to analyzeCompare and optimizeCompareInstr to handle Compare | Manman Ren |
| 2012-06-29 | Clear kill flags in InstrEmitter::EmitSubregNode(). | Jakob Stoklund Olesen |
| 2012-06-29 | Check for extra kill flags on live-out virtual registers. | Jakob Stoklund Olesen |
| 2012-06-29 | Add getUniqueVRegDef to MachineRegisterInfo. | Manman Ren |
| 2012-06-29 | Cleanup in DwarfDebug - fix a typo and remove two unused functions | Alexey Samsonov |
| 2012-06-29 | Move llvm/Support/IRBuilder.h -> llvm/IRBuilder.h | Chandler Carruth |
| 2012-06-29 | The DIBuilder class is just a wrapper around debug info creation | Bill Wendling |
| 2012-06-29 | Revert "Make NumMicroOps a variable in the subtarget's instruction itinerary." | Andrew Trick |
| 2012-06-29 | misched: avoid scheduling instructions that can't be dispatched. | Andrew Trick |
| 2012-06-29 | misched: count micro-ops toward the issue limit. | Andrew Trick |
| 2012-06-29 | Make NumMicroOps a variable in the subtarget's instruction itinerary. | Andrew Trick |
| 2012-06-28 | add a new @llvm.donothing intrinsic that, well, does nothing, and teach CodeG... | Nuno Lopes |
| 2012-06-28 | 'Promote' vector [su]int_to_fp should widen elements. | Jim Grosbach |
| 2012-06-28 | Move lib/Analysis/DebugInfo.cpp to lib/VMCore/DebugInfo.cpp and | Bill Wendling |
| 2012-06-26 | Allow targets to inject passes before the virtual register rewriter. | Jakob Stoklund Olesen |
| 2012-06-26 | Update a bunch of stale comments that dated from when this folled the | Chandler Carruth |
