| Age | Commit message (Expand) | Author |
|---|
| 2012-04-09 | Remove unnecessary type check when combining and/or/xor of swizzles. Move som... | Craig Topper |
| 2012-04-09 | Remove unnecessary 'else' on an 'if' that always returns | Craig Topper |
| 2012-04-09 | Optimize code slightly. No functionality change. | Craig Topper |
| 2012-04-09 | Replace some explicit checks with asserts for conditions that should never ha... | Craig Topper |
| 2012-04-08 | Optimize code a bit. No functional change intended. | Craig Topper |
| 2012-04-08 | Silence sign-compare warning. | Benjamin Kramer |
| 2012-04-08 | Only have codegen turn fdiv by a constant into fmul by the reciprocal | Duncan Sands |
| 2012-04-08 | Simplify code that tries to do vector extracts for shuffles when the mask wid... | Craig Topper |
| 2012-04-08 | Move the TLSModel information into the TargetMachine rather than hiding | Chandler Carruth |
| 2012-04-07 | Turn avx2 vinserti128 intrinsic calls into INSERT_SUBVECTOR DAG nodes and rem... | Craig Topper |
| 2012-04-07 | Remove 'else' after 'if' that ends in return. | Craig Topper |
| 2012-04-07 | 1. Remove the part of r153848 which optimizes shuffle-of-shuffle into a new | Nadav Rotem |
| 2012-04-07 | Convert floating point division by a constant into multiplication by the | Duncan Sands |
| 2012-04-05 | Don't break the IV update in TLI::SimplifySetCC(). | Jakob Stoklund Olesen |
| 2012-04-05 | Treat f16 the same as f80/f128 for the purposes of generating constants durin... | Owen Anderson |
| 2012-04-04 | f16 FREM can now be legalized by promoting to f32 | Pete Cooper |
| 2012-04-04 | Always compute all the bits in ComputeMaskedBits. | Rafael Espindola |
| 2012-04-04 | Remove default case from switch that was already covering all cases. | Craig Topper |
| 2012-04-04 | Removed useless switch for default case when switch was covering all the enum... | Pete Cooper |
| 2012-04-03 | Add VSELECT to LegalizeVectorTypes::ScalariseVectorResult. Previously it wou... | Pete Cooper |
| 2012-04-03 | Fix an issue in SimplifySetCC() specific to vector comparisons. | Chad Rosier |
| 2012-04-02 | Add predicates for checking whether targets have free FNEG and FABS operation... | Owen Anderson |
| 2012-04-02 | Optimizing swizzles of complex shuffles may generate additional complex shuff... | Nadav Rotem |
| 2012-04-01 | This commit contains a few changes that had to go in together. | Nadav Rotem |
| 2012-03-31 | Teach CodeGen's version of computeMaskedBits to understand the range metadata. | Rafael Espindola |
| 2012-03-30 | If we have a VLA that has a "use" in a metadata node that's then used | Bill Wendling |
| 2012-03-28 | More debug output. | Eric Christopher |
| 2012-03-27 | fix what looks like a real logic bug, found by PVS-Studio (part of PR12357) | Chris Lattner |
| 2012-03-26 | Add a debug statement. | Eric Christopher |
| 2012-03-24 | Add the ability to promote legal integer VAARGs. This is required for the PPC... | Hal Finkel |
| 2012-03-22 | Source order scheduler should not preschedule nodes with multiple uses. rdar:... | Evan Cheng |
| 2012-03-22 | Assign node orders to target intrinsics which do not produce results. rdar://... | Evan Cheng |
| 2012-03-22 | [fast-isel] Fold "urem x, pow2" -> "and x, pow2-1". This should fix the 271% | Chad Rosier |
| 2012-03-21 | Checking a build_vector for an all-ones value. | Jim Grosbach |
| 2012-03-20 | When combining (vextract shuffle (load ), <1,u,u,u>), 0) -> (load ), add user... | Craig Topper |
| 2012-03-20 | Do everything up to generating code to try to get a register for | Eric Christopher |
| 2012-03-20 | Untabify. | Eric Christopher |
| 2012-03-20 | Add another debugging statement here. | Eric Christopher |
| 2012-03-20 | Use lookUpRegForValue here instead of duplicating the code. | Eric Christopher |
| 2012-03-19 | f16 FDIV can now be legalized by promoting to f32 | Pete Cooper |
| 2012-03-19 | Fix DAG combine which creates illegal vector shuffles. Patch by Heikki Kultala. | Duncan Sands |
| 2012-03-16 | Revert r152613 (and r152614), "Inline the d'tor and add an anchor instead." f... | NAKAMURA Takumi |
| 2012-03-15 | We actually handle AllocaInst via getRegForValue below just fine. | Eric Christopher |
| 2012-03-15 | Add some debugging output into fast isel as well. | Eric Christopher |
| 2012-03-15 | Add another debug statement. | Eric Christopher |
| 2012-03-15 | When optimizing certain BUILD_VECTOR nodes into other BUILD_VECTOR nodes, add... | Nadav Rotem |
| 2012-03-15 | Add a xform to the DAG combiner. | Bill Wendling |
| 2012-03-14 | Insert the debugging instructions in one fell-swoop so that it doesn't call the | Bill Wendling |
| 2012-03-13 | Fortify r152675 a bit. Although I'm not able to come up with a test case that... | Evan Cheng |
| 2012-03-13 | DAG combine incorrectly optimize (i32 vextract (v4i16 load $addr), c) to | Evan Cheng |
