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path: root/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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2007-10-06Added DAG xforms. e.g.Evan Cheng
(vextract (v4f32 s2v (f32 load $addr)), 0) -> (f32 load $addr) (vextract (v4i32 bc (v4f32 s2v (f32 load $addr))), 0) -> (i32 load $addr) Remove x86 specific patterns. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42677 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-18Fix a bogus splat xform:Evan Cheng
shuffle <undef, undef, x, undef>, <undef, undef, undef, undef>, <2, 2, 2, 2> != <undef, undef, x, undef> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42111 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-18Prevent crash on long double.Dale Johannesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42103 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-12Revise previous patch per review comments.Dale Johannesen
Next round of x87 long double stuff. Getting close now, basically works. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41875 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-11Add APInt interfaces to APFloat (allows directlyDale Johannesen
access to bits). Use them in place of float and double interfaces where appropriate. First bits of x86 long double constants handling (untested, probably does not work). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41858 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-10Emit:Chris Lattner
cmpl %eax, %ecx setae %al movzbl %al, %eax instead of: cmpl %eax, %ecx setb %al xorb $1, %al movzbl %al, %eax when using logical not of a C comparison. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41807 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-31Add mod, copysign, abs operations to APFloat.Dale Johannesen
Implement some constant folding in SelectionDAG and DAGCombiner using APFloat. Remove double versions of constructor and getValue from ConstantFPSDNode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41664 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-27Make DAGCombiner's global alias analysis query more precise in the caseDan Gohman
where both pointers have non-zero offsets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41491 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-26Revise per review comments.Dale Johannesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41409 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-25Add APFloat interface to ConstantFPSDNode. ChangeDale Johannesen
over uses in DAGCombiner. Fix interfaces to work with APFloats. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41407 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-18Fold C ? 0 : 1 to ~C or zext(~C) or trunc(~C) depending the types.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41163 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-26Fix the alias analysis query in DAGCombiner to not add in twoDan Gohman
offsets. The SrcValueOffset values are the real offsets from the SrcValue base pointers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40534 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-13Don't call SimplifyVBinOp for non-vector operations, following earlier reviewDan Gohman
feedback. This theoretically makes the common (scalar) case more efficient. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39823 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-10Fix a bug in the folding of binary operators to undef.Dan Gohman
Thanks to Lauro for spotting this! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38491 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-10Fix the folding of undef in several binary operators to recognizeDan Gohman
undef in either the left or right operand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38489 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-09Preserve volatililty and alignment information when lowering orDan Gohman
simplifying loads and stores. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38473 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-09Fix this warning:Chris Lattner
DAGCombiner.cpp: In member function 'llvm::SDOperand<unnamed>::DAGCombiner::visitOR(llvm::SDNode*)': DAGCombiner.cpp:1608: warning: passing negative value '-0x00000000000000001' for argument 1 to 'llvm::SDOperand llvm::SelectionDAG::getConstant(uint64_t, llvm::MVT::ValueType, bool)' oiy. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38458 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-03Fix several over-aggressive folds for undef nodes in dagcombine, toDan Gohman
follow the rules for undef used in instcombine. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37851 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-02Teach GetNegatedExpression to negate 0-B to B in UnsafeFPMath mode, andDan Gohman
visitFSUB to fold 0-B to -B in UnsafeFPMath mode. Also change visitFNEG to use isNegatibleForFree/GetNegatedExpression instead of doing a subset of the same thing manually. This fixes test/CodeGen/X86/negative-sin.ll. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37842 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-25Generalize MVT::ValueType and associated functions to be able to representDan Gohman
extended vector types. Remove the special SDNode opcodes used for pre-legalize vector operations, and the special MVT::Vector type used with them. Adjust lowering and legalize to work with the normal SDNode kinds instead, and to use the normal MVT functions to work with vector types instead of using the two special operands that the pre-legalize nodes held. This allows pre-legalize and post-legalize DAGs, and the code that operates on them, to be more consistent. Pre-legalize vector operators can be handled more consistently with scalar operators. And, -view-dag-combine1-dags and -view-legalize-dags now look prettier for vector code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37719 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-22Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits fromDan Gohman
TargetLowering to SelectionDAG so that they have more convenient access to the current DAG, in preparation for the ValueType routines being changed from standalone functions to members of SelectionDAG for the pre-legalize vector type changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37704 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-21Xforms:Evan Cheng
(add (select cc, 0, c), x) -> (select cc, x, (add, x, c)) (sub x, (select cc, 0, c)) -> (select cc, x, (sub, x, c)) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37685 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-19Pass a SelectionDAG into SDNode::dump everywhere it's used, in preprationDan Gohman
for needing the DAG node to print pre-legalize extended value types, and to get better debug messages with target-specific nodes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37656 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-14Rename MVT::getVectorBaseType to MVT::getVectorElementType.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37579 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-25tighten up recursion depth againChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37330 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-24Fix a typo that caused combiner to create mal-formed pre-indexed store where ↵Evan Cheng
value store is the same as the base pointer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37318 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-23prevent exponential recursion in isNegatibleForFreeChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37310 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-18Qualify calls to getTypeForValueType with MVT:: too.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37233 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-16Don't fold bitconvert(load) for preinc/postdec loads. Likewise stores.Dale Johannesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37130 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-16Use a ptr set instead of a linear search to unique TokenFactor operands.Chris Lattner
This fixes PR1423 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37102 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-16Bug fix: should check ABI alignment, not pref. alignment.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37094 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-15Fix an infinite recursion in GetNegatedExpression.Lauro Ramos Venancio
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37086 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-14implement a simple fneg optimization/propagation thing. This compiles:Chris Lattner
CodeGen/PowerPC/fneg.ll into: _t4: fmul f0, f3, f4 fmadd f1, f1, f2, f0 blr instead of: _t4: fneg f0, f3 fmul f0, f0, f4 fmsub f1, f1, f2, f0 blr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37054 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-09Can't fold the bit_convert is the store is a truncating store.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36962 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-07Forgot a check.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36910 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-07Enable a couple of xforms:Evan Cheng
- (store (bitconvert v)) -> (store v) if resultant store does not require higher alignment - (bitconvert (load v)) -> (load (bitconvert*)v) if resultant load does not require higher alignment git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36908 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-03Don't create indexed load / store with zero offset!Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36716 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-01Forgot about chain result; also UNDEF cannot have multiple values.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36622 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-01* Only turn a load to UNDEF if all of its outputs have no uses (indexed loadsEvan Cheng
produce two results.) * Do not touch volatile loads. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36604 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-22PR400 phase 2. Propagate attributed load/store information through DAGs.Christopher Lamb
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36356 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-21Revert Christopher Lamb's load/store alignment changes.Reid Spencer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36309 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-21add support for alignment attributes on load/store instructionsChristopher Lamb
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36301 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-18allow SRL to simplify its operands, as it doesn't demand all bits as input.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36245 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-18When replacing a node in SimplifyDemandedBits, if the old node used anyChris Lattner
single-use nodes, they will be dead soon. Make sure to remove them before processing other nodes. This implements CodeGen/X86/shl_elim.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36244 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-17SIGN_EXTEND_INREG does not demand its top bits. Give SimplifyDemandedBitsChris Lattner
a chance to hack on it. This compiles: int baz(long long a) { return (short)(((int)(a >>24)) >> 9); } into: _baz: slwi r2, r3, 8 srwi r2, r2, 9 extsh r3, r2 blr instead of: _baz: srwi r2, r4, 24 rlwimi r2, r3, 8, 0, 23 srwi r2, r2, 9 extsh r3, r2 blr This implements CodeGen/PowerPC/sign_ext_inreg1.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36212 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-11fix an infinite loop compiling ldecod, notice by JeffC.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35910 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-11Fix this harder.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35888 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-11don't create shifts by zero, fix some problems with my previous patchChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35887 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-11Teach the codegen to turn [aez]ext (setcc) -> selectcc of 1/0, which oftenChris Lattner
allows other simplifications. For example, this compiles: int isnegative(unsigned int X) { return !(X < 2147483648U); } Into this code: x86: movl 4(%esp), %eax shrl $31, %eax ret arm: mov r0, r0, lsr #31 bx lr thumb: lsr r0, r0, #31 bx lr instead of: x86: cmpl $0, 4(%esp) sets %al movzbl %al, %eax ret arm: mov r3, #0 cmp r0, #0 movlt r3, #1 mov r0, r3 bx lr thumb: mov r2, #1 mov r1, #0 cmp r0, #0 blt LBB1_2 @entry LBB1_1: @entry cpy r2, r1 LBB1_2: @entry cpy r0, r2 bx lr Testcase here: test/CodeGen/Generic/ispositive.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35883 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-11Codegen integer abs more efficiently using the trick from the PPC CWG. ThisChris Lattner
improves codegen on many architectures. Tests committed as CodeGen/*/iabs.ll X86 Old: X86 New: _test: _test: movl 4(%esp), %ecx movl 4(%esp), %eax movl %ecx, %eax movl %eax, %ecx negl %eax sarl $31, %ecx testl %ecx, %ecx addl %ecx, %eax cmovns %ecx, %eax xorl %ecx, %eax ret ret PPC Old: PPC New: _test: _test: cmpwi cr0, r3, -1 srawi r2, r3, 31 neg r2, r3 add r3, r3, r2 bgt cr0, LBB1_2 ; xor r3, r3, r2 LBB1_1: ; blr mr r3, r2 LBB1_2: ; blr ARM Old: ARM New: _test: _test: rsb r3, r0, #0 add r3, r0, r0, asr #31 cmp r0, #0 eor r0, r3, r0, asr #31 movge r3, r0 bx lr mov r0, r3 bx lr Thumb Old: Thumb New: _test: _test: neg r2, r0 asr r2, r0, #31 cmp r0, #0 add r0, r0, r2 bge LBB1_2 eor r0, r2 LBB1_1: @ bx lr cpy r0, r2 LBB1_2: @ bx lr Sparc Old: Sparc New: test: test: save -96, %o6, %o6 save -96, %o6, %o6 sethi 0, %l0 sra %i0, 31, %l0 sub %l0, %i0, %l0 add %i0, %l0, %l1 subcc %i0, -1, %l1 xor %l1, %l0, %i0 bg .BB1_2 restore %g0, %g0, %g0 nop retl .BB1_1: nop or %g0, %l0, %i0 .BB1_2: restore %g0, %g0, %g0 retl nop It also helps alpha/ia64 :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35881 91177308-0d34-0410-b5e6-96231b3b80d8
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