diff options
| author | Dale Johannesen <dalej@apple.com> | 2007-05-16 22:45:30 +0000 |
|---|---|---|
| committer | Dale Johannesen <dalej@apple.com> | 2007-05-16 22:45:30 +0000 |
| commit | 98a6c62aff7393683571b05f73f6f22701569c09 (patch) | |
| tree | c22ffe84ad3324eadcae7194fc0e6d3ba3dad39e /lib/CodeGen/SelectionDAG/DAGCombiner.cpp | |
| parent | d6ddc308f0320f1c35618cca29edcbf9418d65de (diff) | |
Don't fold bitconvert(load) for preinc/postdec loads. Likewise stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37130 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/DAGCombiner.cpp')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index b3a448af84..f6e0a2276f 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -2685,6 +2685,7 @@ SDOperand DAGCombiner::visitBIT_CONVERT(SDNode *N) { // fold (conv (load x)) -> (load (conv*)x) // If the resultant load doesn't need a higher alignment than the original! if (ISD::isNON_EXTLoad(N0.Val) && N0.hasOneUse() && + ISD::isUNINDEXEDLoad(N0.Val) && TLI.isOperationLegal(ISD::LOAD, VT)) { LoadSDNode *LN0 = cast<LoadSDNode>(N0); unsigned Align = TLI.getTargetMachine().getTargetData()-> @@ -3563,7 +3564,8 @@ SDOperand DAGCombiner::visitSTORE(SDNode *N) { // If this is a store of a bit convert, store the input value if the // resultant store does not need a higher alignment than the original. - if (Value.getOpcode() == ISD::BIT_CONVERT && !ST->isTruncatingStore()) { + if (Value.getOpcode() == ISD::BIT_CONVERT && !ST->isTruncatingStore() && + ST->getAddressingMode() == ISD::UNINDEXED) { unsigned Align = ST->getAlignment(); MVT::ValueType SVT = Value.getOperand(0).getValueType(); unsigned OrigAlign = TLI.getTargetMachine().getTargetData()-> |