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path: root/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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2008-11-21Remove chains. Unnecessary.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59783 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-21Rename "ADDO" to "SADDO" and "UADDO". The "UADDO" isn't equivalent to "ADDC"Bill Wendling
because the boolean it returns to indicate an overflow may not be treated like as a flag. It could be stored to memory, for instance. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59780 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-21Implement the sadd_with_overflow intrinsic. This is converted intoBill Wendling
"ISD::ADDO". ISD::ADDO is lowered into a target-independent form that does the addition and then checks if the result is less than one of the operands. (If it is, then there was an overflow.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59779 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-11Fix for PR3040:Bill Wendling
The CC was changed, but wasn't checked to see if it was legal if the DAG combiner was being run after legalization. Threw in a couple of checks just to make sure that it's okay. As far as the PR is concerned, no back-end target actually exhibited this problem, so there isn't an associated testcase. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59035 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-10Added support for the following definition of shufflevector Mon P Wang
<result> = shufflevector <n x <ty>> <v1>, <n x <ty>> <v2>, <m x i32> <mask> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58964 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-05Type of shuffle mask has changed.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58751 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-28Don't produce invalid comparisons after legalize.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58320 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-19Use a legal integer type for vector shuffle maskDuncan Sands
elements. Otherwise LegalizeTypes will, reasonably enough, legalize the mask, which may result in it no longer being a BUILD_VECTOR node (LegalizeDAG simply ignores the legality or not of vector masks). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57782 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-18Teach DAGCombine to fold constant offsets into GlobalAddress nodes,Dan Gohman
and add a TargetLowering hook for it to use to determine when this is legal (i.e. not in PIC mode, etc.) This allows instruction selection to emit folded constant offsets in more cases, such as the included testcase, eliminating the need for explicit arithmetic instructions. This eliminates the need for the C++ code in X86ISelDAGToDAG.cpp that attempted to achieve the same effect, but wasn't as effective. Also, fix handling of offsets in GlobalAddressSDNodes in several places, including changing GlobalAddressSDNode's offset from int to int64_t. The Mips, Alpha, Sparc, and CellSPU targets appear to be unaware of GlobalAddress offsets currently, so set the hook to false on those targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57748 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17Define patterns for shld and shrd that match immediateDan Gohman
shift counts, and patterns that match dynamic shift counts when the subtract is obscured by a truncate node. Add DAGCombiner support for recognizing rotate patterns when the shift counts are defined by truncate nodes. Fix and simplify the code for commuting shld and shrd instructions to work even when the given instruction doesn't have a parent, and when the caller needs a new instruction. These changes allow LLVM to use the shld, shrd, rol, and ror instructions on x86 to replace equivalent code using two shifts and an or in many more cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57662 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-14Rename LoadX to LoadExt.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57526 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-09Rename APFloat::convertToAPInt to bitcastToAPInt toDale Johannesen
make it clearer what the function does. No functional change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57325 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-26Rename ConstantSDNode's getSignExtended to getSExtValue, forDan Gohman
consistancy with ConstantInt, and re-implement it in terms of ConstantInt's getSExtValue. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56700 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-24Reapplying r56550Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56553 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-24Temporarily revert r56550 until missing commit can be added.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56551 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-24Refactor the constant folding code into it's own function. And call it from bothBill Wendling
the SelectionDAG and DAGCombiner code. The only functionality change is that now the DAG combiner is performing the constant folding for these operations instead of being a no-op. This is *not* in response to a bug, so there isn't a testcase. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56550 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-22Per review feedback: Only performEvan Cheng
(srl x, (trunc (and y, c))) -> (srl x, (and (trunc y), c)) etc. when both "trunc" and "and" have single uses. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56452 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-12Change ConstantSDNode and ConstantFPSDNode to use ConstantInt* andDan Gohman
ConstantFP* instead of APInt and APFloat directly. This reduces the amount of time to create ConstantSDNode and ConstantFPSDNode nodes when ConstantInt* and ConstantFP* respectively are already available, as is the case in SelectionDAGBuild.cpp. Also, it reduces the amount of time to legalize constants into constant pools, and the amount of time to add ConstantFP operands to MachineInstrs, due to eliminating ConstantInt::get and ConstantFP::get calls. It increases the amount of work needed to create new constants in cases where the client doesn't already have a ConstantInt* or ConstantFP*, such as legalize expanding 64-bit integer constants to 32-bit constants. And it adds a layer of indirection for the accessor methods. But these appear to be outweight by the benefits in most cases. It will also make it easier to make ConstantSDNode and ConstantFPNode more consistent with ConstantInt and ConstantFP. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56162 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-12Rename ConstantSDNode::getValue to getZExtValue, for consistencyDan Gohman
with ConstantInt. This led to fixing a bug in TargetLowering.cpp using getValue instead of getAPIntValue. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56159 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-08In visitUREM, arrange for the temporary UDIV node to beDan Gohman
revisited, consistent with the code in visitSREM. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55923 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-08Revert my previous change -- the subtraction of two constants was a no-opBill Wendling
before. This is taken care of in the selection DAG pass. In my opinion, this should be in one place or the other. I.e., it should probably be removed from the DAG combiner (along with the other arithmetic transformations on constants that are essentially no-ops). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55889 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-07ConvertBill Wendling
// fold (sub c1, c2) -> c1-c2 from a no-op into an actual transformation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55886 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-05Fix a search+replace-o.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55824 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-04Clean up uses of TargetLowering::getTargetMachine.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55769 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-31Another situation where ROTR is cheaper than ROTL.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55577 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-31For this pattern, ROTR is the cheaper option.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55576 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-31- Fix comment so that it describes how the code really works:Bill Wendling
// fold (or (shl x, (*ext y)), (srl x, (*ext (sub 32, y)))) -> // (rotl x, y) // fold (or (shl x, (*ext y)), (srl x, (*ext (sub 32, y)))) -> // (rotr x, (sub 32, y)) Example: (x == 0xDEADBEEF and y == 4) (x << 4) | (x >> 28) => 0xEADBEEF0 | 0x0000000D => 0xEADBEEFD (rotl x, 4) => 0xEADBEEFD (rotr x, 28) => 0xEADBEEFD - Fix comment and code for second version. It wasn't using the rot* propertly. // fold (or (shl x, (*ext (sub 32, y))), (srl x, (*ext r))) -> // (rotr x, y) // fold (or (shl x, (*ext (sub 32, y))), (srl x, (*ext r))) -> // (rotl x, (sub 32, y)) (x << 28) | (x >> 4) => 0xD0000000 | 0x0DEADBEE => 0xDDEADBEE (rotl x, 4) => 0xEADBEEFD (rotr x, 28) => (0xEADBEEFD) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55575 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30fix some 80-col violationsGabor Greif
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55571 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30Transform (x << (y&31)) -> (x << y). This takes advantage of the fact x86 ↵Evan Cheng
shift instructions 2nd operand (shift count) is limited to 0 to 31 (or 63 in the x86-64 case). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55558 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29Fix 80 col. violations.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55551 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29Back out 55498. It broken Apple style bootstrapping.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55549 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28erect abstraction boundaries for accessing SDValue members, rename Val -> ↵Gabor Greif
Node to reflect semantics git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55504 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28Optimize DAGCombiner's worklist processing. Previously it startedDan Gohman
its work by putting all nodes in the worklist, requiring a big dynamic allocation. Now, DAGCombiner just iterates over the AllNodes list and maintains a worklist for nodes that are newly created or need to be revisited. This allows the worklist to stay small in most cases, so it can be a SmallVector. This has the side effect of making DAGCombine not miss a folding opportunity in alloca-align-rounding.ll. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55498 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-26disallow direct access to SDValue::ResNo, provide a getter insteadGabor Greif
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55394 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20Disable DAGCombine's alignment inference in "fast" codegen mode.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55059 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-14Improve support for vector casts in LLVM IR and CodeGen.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54784 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-11Take the FrameOffset into account when computing the alignmentDan Gohman
of stack objects. This fixes PR2656. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54646 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-31Improve dagcombining for sext-loads and sext-in-reg nodes.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54239 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-27Rename SDOperand to SDValue.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54128 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-27Tidy SDNode::use_iterator, and complete the transition to have itDan Gohman
parallel its analogue, Value::value_use_iterator. The operator* method now returns the user, rather than the use. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54127 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-22Fix pr2566: incorrect assumption about bit_convert. It doesn't not have to ↵Evan Cheng
output a vector value. Patch by Nicolas Capens! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53932 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-21Add titles to the various SelectionDAG viewGraph callsDan Gohman
that include useful information like the name of the block being viewed and the current phase of compilation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53872 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-21Add VerifyNode, a place to put sanity checks onDuncan Sands
generic SDNode's (nodes with their own constructors should do sanity checking in the constructor). Add sanity checks for BUILD_VECTOR and fix all the places that were producing bogus BUILD_VECTORs, as found by "make check". My favorite is the BUILD_VECTOR with only two operands that was being used to build a vector with four elements! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53850 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-18Revert 53729, after waking up in the middle ofDuncan Sands
the night realising that it was wrong :) I think the reason the same type was being used for the shufflevec of indices as for the actual indices is so that if one of them needs splitting then so does the other. After my patch it might be that the indices need splitting but not the rest, yet there is no good way of handling that. I think the right solution is to not have the shufflevec be an operand at all: just have it be the list of numbers it actually is, stored as extra info in the node. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53768 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-17Use a legal type for elements of the vector_shuffleDuncan Sands
mask. These are just indices into the shuffled vector so their type is unrelated to the type of the shuffled elements (which is what was being used before). This fixes vec_shuffle-11.ll when using LegalizeTypes. What seems to have happened is that Dan's recent change r53687, which corrected the result type of the shuffle, somehow caused LegalizeTypes to notice that the mask operand was a BUILD_VECTOR with a legal type but elements of an illegal type (i64). LegalizeTypes legalized this by introducing a new BUILD_VECTOR of i32 and bitcasting it to the old type. But the mask operand is not supposed to be a bitcast but a straight BUILD_VECTOR of constants, causing a crash. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53729 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-16Fix the result type of a VECTOR_SHUFFLE+BIT_CONVERT dagcombine. ThisDan Gohman
was turned up by some new SelectionDAG assertion checks that I'm working on. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53687 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-30Use reserve.Dan Gohman
SelectionDAG::allnodes_size is linear, but that doesn't appear to outweigh the benefit of reducing heap traffic. If it does become a problem, we should teach SelectionDAG to keep a count of how many nodes are live, because there are several other places where that information would be useful as well. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52926 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-28When folding a bitcast into a load or store, preserve the alignmentDan Gohman
information of the original load or store, which is checked to be at least as good, and possibly better. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52849 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-26duncan points out that isOperationLegal includes a check forChris Lattner
type legality. Thanks Duncan! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52786 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-26when we know the signbit of an input to uint_to_fp is zero,Chris Lattner
change it to sint_to_fp on targets where that is cheaper (and visaversa of course). This allows us to compile uint_to_fp to: _test: movl 4(%esp), %eax shrl $23, %eax cvtsi2ss %eax, %xmm0 movl 8(%esp), %eax movss %xmm0, (%eax) ret instead of: .align 3 LCPI1_0: ## double .long 0 ## double least significant word 4.5036e+15 .long 1127219200 ## double most significant word 4.5036e+15 .text .align 4,0x90 .globl _test _test: subl $12, %esp movl 16(%esp), %eax shrl $23, %eax movl %eax, (%esp) movl $1127219200, 4(%esp) movsd (%esp), %xmm0 subsd LCPI1_0, %xmm0 cvtsd2ss %xmm0, %xmm0 movl 20(%esp), %eax movss %xmm0, (%eax) addl $12, %esp ret git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52747 91177308-0d34-0410-b5e6-96231b3b80d8
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