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path: root/lib/CodeGen/RegAllocLocal.cpp
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2004-02-19Rename reloads/spills to loads/stores.Alkis Evlogimenos
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11619 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17Remove the -disable-kill option. The register allocator is buggy with it,Chris Lattner
and it was only for debugging in the first place. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11557 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17Add support to the local allocator for fusing spill code into the instructionsChris Lattner
that need them. This is very useful on CISCy targets like the X86 because it reduces the total spill pressure, and makes better use of it's (large) instruction set. Though the X86 backend doesn't know how to rewrite many instructions yet, this already makes a substantial difference on 176.gcc for example: Before: Time: 8.0099 ( 31.2%) 0.0100 ( 12.5%) 8.0199 ( 31.2%) 7.7186 ( 30.0%) Local Register Allocator Code quality: 734559 asm-printer - Number of machine instrs printed 111395 ra-local - Number of registers reloaded 79902 ra-local - Number of registers spilled 231554 x86-peephole - Number of peephole optimization performed After: Time: 7.8700 ( 30.6%) 0.0099 ( 19.9%) 7.8800 ( 30.6%) 7.7892 ( 30.2%) Local Register Allocator Code quality: 733083 asm-printer - Number of machine instrs printed 2379 ra-local - Number of reloads fused into instructions 109046 ra-local - Number of registers reloaded 79881 ra-local - Number of registers spilled 230658 x86-peephole - Number of peephole optimization performed So by fusing 2300 instructions, we reduced the static number of instructions by 1500, and reduces the number of peepholes (and thus the work) by about 900. This also clearly reduces the number of reload/spill instructions that are emitted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11542 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17Fix a bug in my previous refactoring change... arg!Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11535 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17Once we have a way to fold spill code reloads into instructions, we have a ↵Chris Lattner
way to use it. :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11517 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17Refactor code a bit. No functionality changes, though the comment hints at ↵Chris Lattner
things to come. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11515 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-15Make dense maps keyed on physical registers smallerusingAlkis Evlogimenos
MRegisterInfo::getNumRegs() instead of MRegisterInfo::FirstVirtualRegister. Also use MRegisterInfo::is{Physical,Virtual}Register where appropriate. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11477 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-13Remove getAllocatedRegNum(). Use getReg() instead.Alkis Evlogimenos
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11393 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-13Use getNumVirtualRegs().Alkis Evlogimenos
Whitespace cleanups. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11389 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-12Change MachineBasicBlock's vector of MachineInstr pointers into anAlkis Evlogimenos
ilist of MachineInstr objects. This allows constant time removal and insertion of MachineInstr instances from anywhere in each MachineBasicBlock. It also allows for constant time splicing of MachineInstrs into or out of MachineBasicBlocks. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11340 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-10Do not use MachineOperand::isVirtualRegister either!Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11283 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-10Eliminate users of MachineOperand::isPhysicalRegisterChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11278 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-09Another nice speedup for the register allocator. This time, we replaceChris Lattner
the Virt2PhysRegMap std::map with an std::vector. This speeds up the register allocator another (almost) 40%, from .72->.45s in a release build of LLC on 253.perlbmk. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11219 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-09Change the PhysRegsUsed map into a dense array. Seeing that this is a mappingChris Lattner
from physical registers, and they are always dense, it makes sense to not have a ton of RBtree overhead. This change speeds up regalloclocal about ~30% on 253.perlbmk, from .35s -> .27s in the JIT (in LLC, it goes from .74 -> .55). Now live variable analysis is the slowest codegen pass. Of course it doesn't help that we have to run it twice, because regalloclocal doesn't update it, but even if it did it would be the slowest pass (now it's just the 2x slowest pass :( git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11215 91177308-0d34-0410-b5e6-96231b3b80d8
2004-01-31Finegrainify namespacification, use new MRegisterInfo::isVirtualRegisterChris Lattner
method git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11037 91177308-0d34-0410-b5e6-96231b3b80d8
2004-01-13Correctly compute live variable information for physical registersAlkis Evlogimenos
when an implicitely defined register is later used by an alias. For example: call foo %reg1024 = mov %AL The call implicitely defines EAX but only AL is used. Before this fix no information was available on AL. Now EAX and all its aliases except AL get defined and die at the call instruction whereas AL lives to be killed by the assignment. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10813 91177308-0d34-0410-b5e6-96231b3b80d8
2003-12-18Remove TwoAddressInstruction from the public headers and add an IDAlkis Evlogimenos
instead, since this pass doesn't expose any state to its users. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10520 91177308-0d34-0410-b5e6-96231b3b80d8
2003-12-18Modify local register allocator to use the two-address instruction pass.Alkis Evlogimenos
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10513 91177308-0d34-0410-b5e6-96231b3b80d8
2003-12-14Change interface of MachineOperand as follows:Alkis Evlogimenos
a) remove opIsUse(), opIsDefOnly(), opIsDefAndUse() b) add isUse(), isDef() c) rename opHiBits32() to isHiBits32(), opLoBits32() to isLoBits32(), opHiBits64() to isHiBits64(), opLoBits64() to isLoBits64(). This results to much more readable code, for example compare "op.opIsDef() || op.opIsDefAndUse()" to "op.isDef()" a pattern used very often in the code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10461 91177308-0d34-0410-b5e6-96231b3b80d8
2003-12-13Remove unecessary if statements when looping on ImplicitDefs.Alkis Evlogimenos
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10444 91177308-0d34-0410-b5e6-96231b3b80d8
2003-12-05Make assertion stricter. Since the source operands are allocated atAlkis Evlogimenos
this point, the second operand must be a physical register (it cannot be a virtual one). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10292 91177308-0d34-0410-b5e6-96231b3b80d8
2003-11-11Put all LLVM code into the llvm namespace, as per bug 109.Brian Gaeke
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9903 91177308-0d34-0410-b5e6-96231b3b80d8
2003-10-24standardize command line option namesChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9496 91177308-0d34-0410-b5e6-96231b3b80d8
2003-10-20Added LLVM project notice to the top of every C++ source file.John Criswell
Header files will be on the way. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9298 91177308-0d34-0410-b5e6-96231b3b80d8
2003-10-08Change MRegisterDesc::AliasSet, TargetInstrDescriptor::ImplicitDefsAlkis Evlogimenos
and TargetInstrDescriptor::ImplicitUses to always point to a null terminated array and never be null. So there is no need to check for pointer validity when iterating over those sets. Code that looked like: if (const unsigned* AS = TID.ImplicitDefs) { for (int i = 0; AS[i]; ++i) { // use AS[i] } } was changed to: for (const unsigned* AS = TID.ImplicitDefs; *AS; ++AS) { // use *AS } git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8960 91177308-0d34-0410-b5e6-96231b3b80d8
2003-08-23Fix bug: Jello/2003-08-23-RegisterAllocatePhysReg.llChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8095 91177308-0d34-0410-b5e6-96231b3b80d8
2003-08-17Fix bug: Jello/2003-08-15-AllocaAssertion.llChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7916 91177308-0d34-0410-b5e6-96231b3b80d8
2003-08-15Fix typo in commentBrian Gaeke
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7906 91177308-0d34-0410-b5e6-96231b3b80d8
2003-08-13Factory methods for FunctionPasses now return type FunctionPass *.Brian Gaeke
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7823 91177308-0d34-0410-b5e6-96231b3b80d8
2003-08-05Fix bugs handling ESP in alloca referencesChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7591 91177308-0d34-0410-b5e6-96231b3b80d8
2003-08-05Revert previous change, and be really anal about what physical registers can do.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7588 91177308-0d34-0410-b5e6-96231b3b80d8
2003-08-04Don't bother calculating info unless its needed. May reduce number of stack ↵Chris Lattner
slots created. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7584 91177308-0d34-0410-b5e6-96231b3b80d8
2003-08-04* Fix spelling of 'necessary'Chris Lattner
* Add a lot more DEBUG output, which is better structured than before * Fix bug: Jello/2003-08-04-PhysRegLiveFailure.llx git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7583 91177308-0d34-0410-b5e6-96231b3b80d8
2003-08-03Set debug typesChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7533 91177308-0d34-0410-b5e6-96231b3b80d8
2003-08-03Wrap at 80 columnsChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7503 91177308-0d34-0410-b5e6-96231b3b80d8
2003-08-01Move DEBUG to Debug.hChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7497 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27(1) Added special register class containing (for now) %fsr.Vikram S. Adve
Fixed spilling of %fcc[0-3] which are part of %fsr. (2) Moved some machine-independent reg-class code to class TargetRegInfo from SparcReg{Class,}Info. (3) Renamed MachienOperand::opIsDef to MachineOperand::opIsDefOnly() and related functions and flags. Fixed several bugs where only "isDef" was being checked, not "isDefAndUse". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6341 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-12Fix tab infestation!Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6109 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-04Debug output should go to cerr, not cout, because that's where bytecode goes.Misha Brukman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6002 91177308-0d34-0410-b5e6-96231b3b80d8
2003-01-16Fix problems with empty basic blocksChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5326 91177308-0d34-0410-b5e6-96231b3b80d8
2003-01-14Rename MachineInstrInfo -> TargetInstrInfoChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5272 91177308-0d34-0410-b5e6-96231b3b80d8
2003-01-13* Convert to use LiveVariable analysisChris Lattner
* Convert to use PHIElimination pass * Don't spill values which have just been reloaded (big win reducing spills) * Add experimental support for eliminating spills before TwoAddress instructions. It currently is broken so it is #ifdef'd out. * Use new "is terminator" flag on instructions instead of looking for branches and returns explicitly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5219 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-28 Rename FunctionFrameInfo to MachineFrameInfoChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5200 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-28* Convert to be a MachineFunctionPass instanceChris Lattner
* Use new FunctionFrameInfo object to manage stack slots instead of doing it directly * Adjust to new MRegisterInfo API * Don't take a TM as a ctor argument * Don't keep track of which callee saved registers are modified * Don't emit prolog/epilog code or spill/restore code for callee saved regs * Use new allocation_order_begin/end iterators to simplify dramatically the logic for picking registers to allocate * Machine PHI nodes can no longer contain constant arguments git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5195 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-25Adjust to simpler spill interfaceChris Lattner
Only spill and reload caller saved registers that are actually modified. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5145 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-24Substantial fixes to live range handling, fixing several problems, gettingChris Lattner
strtol to not miscompile, and fixing bug: 2002-12-23-LocalRAProblem.llx git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5132 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-18* Fix several register aliasing bugsChris Lattner
* Add a new option to eliminate spilling of registers that are only used within a basic block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5106 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-17Use new reginfo interfaceChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5099 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-17Add prolog/epilog spills/reloads to countersChris Lattner
Move X86 specific alignment gunk to X86 files git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5096 91177308-0d34-0410-b5e6-96231b3b80d8
2002-12-17Fix many bugs, regallocator now saves callee-save registers instead of targetChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5093 91177308-0d34-0410-b5e6-96231b3b80d8
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