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allow it to go into an infinite loop, filling up the disk!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30494 91177308-0d34-0410-b5e6-96231b3b80d8
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safe for later allocation. This fixes McCat/18-imp with llc-beta.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30204 91177308-0d34-0410-b5e6-96231b3b80d8
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of unallocatable registers, just because an alias is allocatable. We were
picking registers like SIL just because ESI was being used.
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Just because an alias of a register is available, it doesn't mean that we
can arbitrarily evict the register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30064 91177308-0d34-0410-b5e6-96231b3b80d8
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livevariables information. This fixes several regalloc=local failures on x86
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29220 91177308-0d34-0410-b5e6-96231b3b80d8
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dropped. This shrinks libllvmgcc.dylib another 67K
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28975 91177308-0d34-0410-b5e6-96231b3b80d8
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live at function entry. This prevents it from using arg registers for other
purposes before the arguments are used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28809 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24258 91177308-0d34-0410-b5e6-96231b3b80d8
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allocator from 23s to 11s on kc++ in debug mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24255 91177308-0d34-0410-b5e6-96231b3b80d8
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code. PrologEpilogInserter hasn't been updated yet though, so targets cannot
use this info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23536 91177308-0d34-0410-b5e6-96231b3b80d8
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Patch contributed by Morten Ofstad
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17251 91177308-0d34-0410-b5e6-96231b3b80d8
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Move include/Config and include/Support into include/llvm/Config,
include/llvm/ADT and include/llvm/Support. From here on out, all LLVM
public header files must be under include/llvm/.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16137 91177308-0d34-0410-b5e6-96231b3b80d8
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"Support/Debug.h".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15089 91177308-0d34-0410-b5e6-96231b3b80d8
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The vector may actually be empty if the register that we are marking as
recently used is not actually allocatable. This happens for physical registers
that are not allocatable, like the ST(x) registers on X86.
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instruction to make the API more flexible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12386 91177308-0d34-0410-b5e6-96231b3b80d8
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MRegisterInfo::is{Physical,Virtual}Register. Apply appropriate fixes
to relevant files.
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to objects.
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block into MachineBasicBlock::getFirstTerminator().
This also fixes a bug in the implementation of the above in both
RegAllocLocal and InstrSched, where instructions where added after the
terminator if the basic block's only instruction was a terminator (it
shouldn't matter for RegAllocLocal since this case never occurs in
practice).
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one terminator instruction in each basic block.
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variable information to take into account the change of instruction
address.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11628 91177308-0d34-0410-b5e6-96231b3b80d8
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and it was only for debugging in the first place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11557 91177308-0d34-0410-b5e6-96231b3b80d8
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that need them. This is very useful on CISCy targets like the X86 because it
reduces the total spill pressure, and makes better use of it's (large)
instruction set. Though the X86 backend doesn't know how to rewrite many
instructions yet, this already makes a substantial difference on 176.gcc for
example:
Before:
Time:
8.0099 ( 31.2%) 0.0100 ( 12.5%) 8.0199 ( 31.2%) 7.7186 ( 30.0%) Local Register Allocator
Code quality:
734559 asm-printer - Number of machine instrs printed
111395 ra-local - Number of registers reloaded
79902 ra-local - Number of registers spilled
231554 x86-peephole - Number of peephole optimization performed
After:
Time:
7.8700 ( 30.6%) 0.0099 ( 19.9%) 7.8800 ( 30.6%) 7.7892 ( 30.2%) Local Register Allocator
Code quality:
733083 asm-printer - Number of machine instrs printed
2379 ra-local - Number of reloads fused into instructions
109046 ra-local - Number of registers reloaded
79881 ra-local - Number of registers spilled
230658 x86-peephole - Number of peephole optimization performed
So by fusing 2300 instructions, we reduced the static number of instructions
by 1500, and reduces the number of peepholes (and thus the work) by about 900.
This also clearly reduces the number of reload/spill instructions that are
emitted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11542 91177308-0d34-0410-b5e6-96231b3b80d8
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way to use it. :)
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things to come.
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MRegisterInfo::getNumRegs() instead of
MRegisterInfo::FirstVirtualRegister.
Also use MRegisterInfo::is{Physical,Virtual}Register where
appropriate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11477 91177308-0d34-0410-b5e6-96231b3b80d8
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Whitespace cleanups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11389 91177308-0d34-0410-b5e6-96231b3b80d8
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