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2008-10-21Make the NaN test come second, heuristically assumingDan Gohman
that NaNs are less common. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57871 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-21Use Function::getEntryBlock() instead of Function::front(), for clarity.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57870 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-21CMake: updated lib/CodeGen/CMakeLists.txtOscar Fuentes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57869 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-21Fix a bug that prevented llvm-extract -delete from working.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57864 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-21Fix gcc.c-torture/compile/920520-1.c by inserting bitconvertsChris Lattner
for strange asm conditions earlier. In this case, we have a double being passed in an integer reg class. Convert to like sized integer register so that we allocate the right number for the class (two i32's for the f64 in this case). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57862 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-20Add skeleton for the pre-register allocation live interval splitting pass.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57847 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-20Update the stub and callback code to handle lazy compilation. The stubJim Grosbach
is re-written by the callback to branch directly to the compiled code in future invocations. Added back in range-based memory permission functions for the updating of the stub on Darwin. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57846 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-20Fast-isel no longer an experiment.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57845 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-20Add a register class -> virtual registers map.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57844 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-20This forward declaration is unnecessary.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57843 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-20Support operations like fp_to_uint with a vectorDuncan Sands
result type when the result type is legal but not the operand type. Add additional support for EXTRACT_SUBVECTOR and CONCAT_VECTORS, needed to handle such cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57840 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-20Teach getTypeToTransformTo to return somethingDuncan Sands
sensible for vectors being scalarized. Note that this method can't return anything very sensible when splitting non-power-of-two vectors. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57839 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-20LegalizeTypes support for atomic operation promotion.Duncan Sands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57838 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-20Use DAG.getIntPtrConstant rather than DAG.getConstantDuncan Sands
with TLI.getPointerTy for a small simplification. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57837 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-20Always use either MVT::i1 or getSetCCResultType forDuncan Sands
the condition of a SELECT node. Make sure that the correct extension type (any-, sign- or zero-extend) is used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57836 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-20Formatting - no functional change.Duncan Sands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57834 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-20Don't use a random type for the select condition,Duncan Sands
use an MVT::i1 and simplify the code while there. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57833 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-20Fix a typo in a comment.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57832 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-20Have X86 custom lowering for LegalizeTypes useDuncan Sands
LowerOperation if it doesn't know what else to do. This methods should probably be factorized some, but this is good enough for the moment. Have LowerATOMIC_BINARY_64 use EXTRACT_ELEMENT rather than assuming the operand is a BUILD_PAIR (if it is then getNode will automagically simplify the EXTRACT_ELEMENT). This way LowerATOMIC_BINARY_64 usable from LegalizeTypes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57831 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-20Fix typo in a comment.Matthijs Kooijman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57829 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-20Remove another stale comment.Matthijs Kooijman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57828 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-20Remove an inappropriate (probably outdated) comment.Matthijs Kooijman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57827 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-20Fix spelling error.Matthijs Kooijman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57820 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-19Set N->OperandList to 0 after deletion. Otherwise, it's possible that it willBill Wendling
be either deleted or referenced afterwards. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57786 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-19Fix comment. Other formatting changes. No functionality changes.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57785 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-19Vector shuffle mask elements may be "undef". HandleDuncan Sands
this everywhere in LegalizeTypes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57783 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-19Use a legal integer type for vector shuffle maskDuncan Sands
elements. Otherwise LegalizeTypes will, reasonably enough, legalize the mask, which may result in it no longer being a BUILD_VECTOR node (LegalizeDAG simply ignores the legality or not of vector masks). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57782 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-18Reapply r57699 with a fix to not crash on asms with multiple results. UnlikeChris Lattner
the previous patch this one actually passes make check. "Fix PR2356 on PowerPC: if we have an input and output that are tied together that have different sizes (e.g. i32 and i64) make sure to reserve registers for the bigger operand." git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57771 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-18Don't truncate GlobalAddress offsets to int in debug output.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57770 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-18By min, I mean max.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57766 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-18When creating intervals, leave min(1, numdefs) holes after each instruction.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57765 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-18Make llvm memory barrier available as an intrinsicMon P Wang
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57750 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-18Teach DAGCombine to fold constant offsets into GlobalAddress nodes,Dan Gohman
and add a TargetLowering hook for it to use to determine when this is legal (i.e. not in PIC mode, etc.) This allows instruction selection to emit folded constant offsets in more cases, such as the included testcase, eliminating the need for explicit arithmetic instructions. This eliminates the need for the C++ code in X86ISelDAGToDAG.cpp that attempted to achieve the same effect, but wasn't as effective. Also, fix handling of offsets in GlobalAddressSDNodes in several places, including changing GlobalAddressSDNode's offset from int to int64_t. The Mips, Alpha, Sparc, and CellSPU targets appear to be unaware of GlobalAddress offsets currently, so set the hook to false on those targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57748 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-18Revert r57699. It's causing regressions inDan Gohman
test/CodeGen/X86/2008-09-17-inline-asm-1.ll and a few others, and it breaks the llvm-gcc build. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57747 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17Use the opcode predicates, instead of duplicating the code.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57735 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17This is now partly done.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57734 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17This is done.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57733 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17Factor out the code for mapping LLVM IR condition opcodes toDan Gohman
ISD condition opcodes into helper functions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57726 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17Add implicit defs of XMM8 to XMM15 on 32-bit call instructions. While this ↵Evan Cheng
is not technically true, it tells tblgen that these instructions "clobber" the entire XMM register file. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57723 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17Add RCBarriers to TargetInstrDesc. It's a list of register classes the given ↵Evan Cheng
instruction can "clobber". For example, on x86 the call instruction can modify all of the XMM and fp stack registers. TableGen has been taught to generate the lists from instruction definitions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57722 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17Fix PR2898. Spiller delete a store for reuse before it knows for sure the ↵Evan Cheng
reuse happened. Patch by Lang Hames! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57720 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17add support for 128 bit aggregates.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57715 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17The Dwarf writer was comparing mangled and unmangled names for C++ code when weBill Wendling
have an unreachable block in a function. This was triggering the assert. This is a horrid hack to cover this up. Oh! for a good debug info architecture! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57714 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17Added MemIntrinsicNode which is useful to represent target intrinsics thatMon P Wang
touches memory and need an associated MemOperand git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57712 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17Factor out the code for mapping LLVM IR condition opcodes toDan Gohman
ISD condition opcodes into helper functions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57710 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17add support for 128 bit inputs on both x86-64 and x86-32.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57709 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17Fix a bug where the x86 backend would reject 64-bit r constraints whenChris Lattner
in 32-bit mode instead of assigning a register pair. This has nothing to do with PR2356, but I happened to notice it while working on it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57704 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17Fix PR2356 on PowerPC: if we have an input and output that are tied togetherChris Lattner
that have different sizes (e.g. i32 and i64) make sure to reserve registers for the bigger operand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57699 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17remove an xfailed test.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57695 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17remove this test: it is xfailed anyway, and is failing for a reasonChris Lattner
other than why it was xfailed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57694 91177308-0d34-0410-b5e6-96231b3b80d8
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