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2005-08-21Simplify the logic for BRTWOWAY_CC handling. The isel code alreadyChris Lattner
simplifies BRTWOWAY into BR if one of the results is a fall-through. Unless I'm missing something, there is no reason to duplicate this in the target-specific code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22952 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-21Implement selection for branches.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22951 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-21Add 5-operand version of SelectNodeToChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22950 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-21add a methodChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22949 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-21Add support for basic blocks, fix a bug in result # computationChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22948 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-21When legalizing brcond ->brcc or select -> selectcc, make sure to truncateChris Lattner
the old condition to a one bit value. The incoming value must have been promoted, and the top bits are undefined. This causes us to generate: _test: rlwinm r2, r3, 0, 31, 31 li r3, 17 cmpwi cr0, r2, 0 bne .LBB_test_2 ; .LBB_test_1: ; li r3, 1 .LBB_test_2: ; blr instead of: _test: rlwinm r2, r3, 0, 31, 31 li r2, 17 cmpwi cr0, r3, 0 bne .LBB_test_2 ; .LBB_test_1: ; li r2, 1 .LBB_test_2: ; or r3, r2, r2 blr for: int %test(bool %c) { %retval = select bool %c, int 17, int 1 ret int %retval } git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22947 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-21If the false value for a select_cc is really simple (has no inputs), evaluateChris Lattner
it in the block. This codegens: int %test(bool %c) { %retval = select bool %c, int 17, int 1 ret int %retval } as: _test: rlwinm r2, r3, 0, 31, 31 li r2, 17 cmpwi cr0, r3, 0 bne .LBB_test_2 ; .LBB_test_1: ; li r2, 1 .LBB_test_2: ; or r3, r2, r2 blr instead of: _test: rlwinm r2, r3, 0, 31, 31 li r2, 17 li r4, 1 cmpwi cr0, r3, 0 bne .LBB_test_2 ; .LBB_test_1: ; or r2, r4, r4 .LBB_test_2: ; or r3, r2, r2 blr ... which is one fewer instruction. The savings are more significant for global address and constantfp nodes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22946 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-21Fix a bug in the RUN lineChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22945 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-21reenable collapse of loadimm+AND -> dep.z (thanks guys)Duraid Madina
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22944 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-20fix bogus warningChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22943 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-20Repair an out by one error for IA64.Jim Laskey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22942 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19add support for global address, including PIC support.Chris Lattner
This REALLY should be lowered by the legalizer! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22941 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19Add support for global address nodesChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22940 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19ADd support for TargetGlobalAddress nodesChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22939 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19Add support for TargetGlobalAddress nodesChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22938 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19Implement CopyFromReg, TokenFactor, and fix a bug in CopyToReg. This allowsChris Lattner
us to compile stuff like this: double %test(double %A, double %B, double %C, double %E) { %F = mul double %A, %A %G = add double %F, %B %H = sub double -0.0, %G %I = mul double %H, %C %J = add double %I, %E ret double %J } to: _test: fnmadd f0, f1, f1, f2 fmadd f1, f0, f3, f4 blr woot! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22937 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19Fix a bug in previous commitChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22936 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19Fix a typeo, no wonder all tokenfactor edges were the same!Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22935 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19Print physreg register nodes with target names (e.g. F1) instead of numbersChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22934 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19Before implementing copyfromreg, we'll implement copytoreg correctly.Chris Lattner
This gets us this for the previous testcase: _test: lis r2, 0 ori r3, r2, 65535 blr Note that we actually write to r3 (the return reg) correctly now :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22933 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19Now that we have operand info for machine instructions, use it to createChris Lattner
temporary registers for things that define a register. This allows dag->dag isel to compile this: int %test() { ret int 65535 } into: _test: lis r2, 0 ori r2, r2, 65535 blr Next up, getting CopyFromReg to work, allowing arguments and cross-bb values. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22932 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19Emit this:Chris Lattner
static const TargetOperandInfo OperandInfo6[] = { { &PPC32::CRRCRegClass }, { 0 }, }; instead of this: static const TargetOperandInfo OperandInfo6[] = { { PPC32::CRRCRegisterClass }, { 0 }, }; For operand information, which does not require dynamic (startup-time) initialization. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22931 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19Expose the derived register classes to the public header, allowing themChris Lattner
to be accessed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22930 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19Split RegisterClass 'Methods' into MethodProtos and MethodBodiesChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22929 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19Split register class "Methods" into MethodProtos and MethodBodiesChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22928 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19put reg classes into namespaceChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22927 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19Put reg classes into namespacesChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22926 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19Put register classes into namespacesChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22925 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19Put register classes in namespacesChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22924 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19Fix code that assumes the register info will be dumped into a targetChris Lattner
namespace instead of the reg class namespace. Update getRegClassForType() to use modified names due to tblgen change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22923 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19put reg classes in namespacesChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22922 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19Require that targets specify a namespace for their register classes.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22921 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19Refactor to use Target.getRegisterClasses consistently, which providesChris Lattner
anonymous regclass definition renaming. Change the generated code to emit register classes as properly namespace qualified entities like everything else. expose the actual class definition as an object, though this isn't quite usable yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22920 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19Emit real operand info for instructions. This currently works but is badChris Lattner
in one way: the generated tables require dynamic initialization for the register classes. This will be fixed in a future patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22919 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19Read the namespace field from register classesChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22918 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19The skeleton target has never had an iselChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22917 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19This code has always been dead on itaniumChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22916 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19This code has always been dead for alphaChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22915 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19The simple isel being gone makes this dead!Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22914 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19Now that the simple isels are dead, so is this.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22913 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19add a setName method to recordChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22912 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19Add a setName method to Record.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22911 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19For now, just emit empty operand info structures.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22910 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19Sparcv9 gets no operand infoChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22909 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19Add a new field to TargetInstrDescriptor for tracking information aboutChris Lattner
operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22908 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19Fix VC++ constant truncation warning.Jeff Cohen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22907 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19Update Visual Studio projects for removed file.Jeff Cohen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22905 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19a bugfix (up top) and a quick repair job: disable generation of dep.zDuraid Madina
(which died about a week ago) so we're back to load-(2^n-1)-then-AND sequences. slow, but things should now be Almost Completely Working, modulo those pesky alignment/ABI issues. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22904 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19Fix a problem jeffc noticedChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22903 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19Fix VC++ precedence warning.Jeff Cohen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22902 91177308-0d34-0410-b5e6-96231b3b80d8
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