diff options
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/PowerPC/PowerPCInstrInfo.h | 34 |
1 files changed, 0 insertions, 34 deletions
diff --git a/lib/Target/PowerPC/PowerPCInstrInfo.h b/lib/Target/PowerPC/PowerPCInstrInfo.h index 63edb78227..29940d65ee 100644 --- a/lib/Target/PowerPC/PowerPCInstrInfo.h +++ b/lib/Target/PowerPC/PowerPCInstrInfo.h @@ -15,7 +15,6 @@ #define POWERPC_INSTRUCTIONINFO_H #include "PowerPC.h" -#include "PowerPCRegisterInfo.h" #include "llvm/Target/TargetInstrInfo.h" namespace llvm { @@ -62,39 +61,6 @@ namespace PPCII { }; } -class PowerPCInstrInfo : public TargetInstrInfo { - const PowerPCRegisterInfo RI; - bool is64bit; -public: - PowerPCInstrInfo(bool is64b); - - /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As - /// such, whenever a client has an instance of instruction info, it should - /// always be able to get register info as well (through this method). - /// - virtual const MRegisterInfo &getRegisterInfo() const { return RI; } - - // - // Return true if the instruction is a register to register move and - // leave the source and dest operands in the passed parameters. - // - virtual bool isMoveInstr(const MachineInstr& MI, - unsigned& sourceReg, - unsigned& destReg) const; - - static unsigned invertPPCBranchOpcode(unsigned Opcode) { - switch (Opcode) { - default: assert(0 && "Unknown PPC branch opcode!"); - case PPC::BEQ: return PPC::BNE; - case PPC::BNE: return PPC::BEQ; - case PPC::BLT: return PPC::BGE; - case PPC::BGE: return PPC::BLT; - case PPC::BGT: return PPC::BLE; - case PPC::BLE: return PPC::BGT; - } - } -}; - } #endif |