diff options
Diffstat (limited to 'lib')
-rw-r--r-- | lib/CodeGen/IfConversion.cpp | 8 | ||||
-rw-r--r-- | lib/Target/ARM/ARMBaseInstrInfo.cpp | 34 | ||||
-rw-r--r-- | lib/Target/ARM/ARMBaseInstrInfo.h | 8 | ||||
-rw-r--r-- | lib/Target/ARM/Thumb2InstrInfo.cpp | 25 | ||||
-rw-r--r-- | lib/Target/ARM/Thumb2InstrInfo.h | 5 |
5 files changed, 33 insertions, 47 deletions
diff --git a/lib/CodeGen/IfConversion.cpp b/lib/CodeGen/IfConversion.cpp index d73cd538f3..c9c56dd86d 100644 --- a/lib/CodeGen/IfConversion.cpp +++ b/lib/CodeGen/IfConversion.cpp @@ -191,13 +191,13 @@ namespace { void MergeBlocks(BBInfo &ToBBI, BBInfo &FromBBI, bool AddEdges = true); bool MeetIfcvtSizeLimit(MachineBasicBlock &BB, unsigned Size) const { - return Size > 0 && TII->isProfitableToIfCvt(BB, Size); + return Size > 0 && TII->isProfitableToIfCvt(BB, Size, 0.5); } bool MeetIfcvtSizeLimit(MachineBasicBlock &TBB, unsigned TSize, MachineBasicBlock &FBB, unsigned FSize) const { return TSize > 0 && FSize > 0 && - TII->isProfitableToIfCvt(TBB, TSize, FBB, FSize); + TII->isProfitableToIfCvt(TBB, TSize, FBB, FSize, 0.5); } // blockAlwaysFallThrough - Block ends without a terminator. @@ -444,7 +444,7 @@ bool IfConverter::ValidSimple(BBInfo &TrueBBI, unsigned &Dups) const { if (TrueBBI.BB->pred_size() > 1) { if (TrueBBI.CannotBeCopied || - !TII->isProfitableToDupForIfCvt(*TrueBBI.BB, TrueBBI.NonPredSize)) + !TII->isProfitableToDupForIfCvt(*TrueBBI.BB, TrueBBI.NonPredSize, 0.5)) return false; Dups = TrueBBI.NonPredSize; } @@ -481,7 +481,7 @@ bool IfConverter::ValidTriangle(BBInfo &TrueBBI, BBInfo &FalseBBI, ++Size; } } - if (!TII->isProfitableToDupForIfCvt(*TrueBBI.BB, Size)) + if (!TII->isProfitableToDupForIfCvt(*TrueBBI.BB, Size, 0.5)) return false; Dups = Size; } diff --git a/lib/Target/ARM/ARMBaseInstrInfo.cpp b/lib/Target/ARM/ARMBaseInstrInfo.cpp index 04aeac3b19..f92317c322 100644 --- a/lib/Target/ARM/ARMBaseInstrInfo.cpp +++ b/lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -1195,22 +1195,36 @@ bool ARMBaseInstrInfo::isSchedulingBoundary(const MachineInstr *MI, return false; } -bool ARMBaseInstrInfo:: -isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumInstrs) const { +bool ARMBaseInstrInfo::isProfitableToIfCvt(MachineBasicBlock &MBB, + unsigned NumInstrs, + float Probability) const { if (!NumInstrs) return false; - if (Subtarget.getCPUString() == "generic") - // Generic (and overly aggressive) if-conversion limits for testing. - return NumInstrs <= 10; - else if (Subtarget.hasV7Ops()) - return NumInstrs <= 3; - return NumInstrs <= 2; + + // Attempt to estimate the relative costs of predication versus branching. + float UnpredCost = Probability * NumInstrs; + UnpredCost += 2.0; // FIXME: Should model a misprediction cost. + + float PredCost = NumInstrs; + + return PredCost < UnpredCost; + } bool ARMBaseInstrInfo:: isProfitableToIfCvt(MachineBasicBlock &TMBB, unsigned NumT, - MachineBasicBlock &FMBB, unsigned NumF) const { - return NumT && NumF && NumT <= 2 && NumF <= 2; + MachineBasicBlock &FMBB, unsigned NumF, + float Probability) const { + if (!NumT || !NumF) + return false; + + // Attempt to estimate the relative costs of predication versus branching. + float UnpredCost = Probability * NumT + (1.0 - Probability) * NumF; + UnpredCost += 2.0; // FIXME: Should model a misprediction cost. + + float PredCost = NumT + NumF; + + return PredCost < UnpredCost; } /// getInstrPredicate - If instruction is predicated, returns its predicate diff --git a/lib/Target/ARM/ARMBaseInstrInfo.h b/lib/Target/ARM/ARMBaseInstrInfo.h index c4af703e9c..f6800bb01a 100644 --- a/lib/Target/ARM/ARMBaseInstrInfo.h +++ b/lib/Target/ARM/ARMBaseInstrInfo.h @@ -312,13 +312,15 @@ public: const MachineFunction &MF) const; virtual bool isProfitableToIfCvt(MachineBasicBlock &MBB, - unsigned NumInstrs) const; + unsigned NumInstrs, float Prob) const; virtual bool isProfitableToIfCvt(MachineBasicBlock &TMBB,unsigned NumT, - MachineBasicBlock &FMBB,unsigned NumF) const; + MachineBasicBlock &FMBB,unsigned NumF, + float Probability) const; virtual bool isProfitableToDupForIfCvt(MachineBasicBlock &MBB, - unsigned NumInstrs) const { + unsigned NumInstrs, + float Probability) const { return NumInstrs && NumInstrs == 1; } diff --git a/lib/Target/ARM/Thumb2InstrInfo.cpp b/lib/Target/ARM/Thumb2InstrInfo.cpp index 09abf1d248..49f5e4a950 100644 --- a/lib/Target/ARM/Thumb2InstrInfo.cpp +++ b/lib/Target/ARM/Thumb2InstrInfo.cpp @@ -28,16 +28,6 @@ using namespace llvm; -static cl::opt<unsigned> -IfCvtLimit("thumb2-ifcvt-limit", cl::Hidden, - cl::desc("Thumb2 if-conversion limit (default 3)"), - cl::init(3)); - -static cl::opt<unsigned> -IfCvtDiamondLimit("thumb2-ifcvt-diamond-limit", cl::Hidden, - cl::desc("Thumb2 diamond if-conversion limit (default 3)"), - cl::init(3)); - Thumb2InstrInfo::Thumb2InstrInfo(const ARMSubtarget &STI) : ARMBaseInstrInfo(STI), RI(*this, STI) { } @@ -105,21 +95,6 @@ Thumb2InstrInfo::isLegalToSplitMBBAt(MachineBasicBlock &MBB, return llvm::getITInstrPredicate(MBBI, PredReg) == ARMCC::AL; } -bool Thumb2InstrInfo::isProfitableToIfCvt(MachineBasicBlock &MBB, - unsigned NumInstrs) const { - return NumInstrs && NumInstrs <= IfCvtLimit; -} - -bool Thumb2InstrInfo:: -isProfitableToIfCvt(MachineBasicBlock &TMBB, unsigned NumT, - MachineBasicBlock &FMBB, unsigned NumF) const { - // FIXME: Catch optimization such as: - // r0 = movne - // r0 = moveq - return NumT && NumF && - NumT <= (IfCvtDiamondLimit) && NumF <= (IfCvtDiamondLimit); -} - void Thumb2InstrInfo::copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, DebugLoc DL, unsigned DestReg, unsigned SrcReg, diff --git a/lib/Target/ARM/Thumb2InstrInfo.h b/lib/Target/ARM/Thumb2InstrInfo.h index b66be8eac4..9ed7eea7e2 100644 --- a/lib/Target/ARM/Thumb2InstrInfo.h +++ b/lib/Target/ARM/Thumb2InstrInfo.h @@ -38,11 +38,6 @@ public: bool isLegalToSplitMBBAt(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI) const; - bool isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumInstrs) const; - - bool isProfitableToIfCvt(MachineBasicBlock &TMBB, unsigned NumTInstrs, - MachineBasicBlock &FMBB, unsigned NumFInstrs) const; - void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, DebugLoc DL, unsigned DestReg, unsigned SrcReg, |