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-rw-r--r--lib/Target/ARM/ARMCodeEmitter.cpp4
-rw-r--r--lib/Target/ARM/ARMConstantIslandPass.cpp2
-rw-r--r--lib/Target/ARM/ARMLoadStoreOptimizer.cpp2
-rw-r--r--lib/Target/Alpha/AlphaBranchSelector.cpp2
-rw-r--r--lib/Target/Alpha/AlphaCodeEmitter.cpp4
-rw-r--r--lib/Target/Alpha/AlphaLLRP.cpp2
-rw-r--r--lib/Target/CBackend/CBackend.cpp4
-rw-r--r--lib/Target/CppBackend/CPPBackend.cpp2
-rw-r--r--lib/Target/IA64/IA64Bundling.cpp2
-rw-r--r--lib/Target/MSIL/MSILWriter.h4
-rw-r--r--lib/Target/Mips/MipsDelaySlotFiller.cpp2
-rw-r--r--lib/Target/PowerPC/PPCBranchSelector.cpp2
-rw-r--r--lib/Target/PowerPC/PPCCodeEmitter.cpp2
-rw-r--r--lib/Target/Sparc/DelaySlotFiller.cpp2
-rw-r--r--lib/Target/Sparc/FPMover.cpp2
-rw-r--r--lib/Target/TargetData.cpp2
-rw-r--r--lib/Target/X86/X86CodeEmitter.cpp4
-rw-r--r--lib/Target/X86/X86FloatingPoint.cpp2
-rw-r--r--lib/Target/X86/X86RegisterInfo.cpp2
19 files changed, 24 insertions, 24 deletions
diff --git a/lib/Target/ARM/ARMCodeEmitter.cpp b/lib/Target/ARM/ARMCodeEmitter.cpp
index 16b00417b3..80f68984a5 100644
--- a/lib/Target/ARM/ARMCodeEmitter.cpp
+++ b/lib/Target/ARM/ARMCodeEmitter.cpp
@@ -39,11 +39,11 @@ namespace {
public:
static char ID;
explicit ARMCodeEmitter(TargetMachine &tm, MachineCodeEmitter &mce)
- : MachineFunctionPass((intptr_t)&ID), II(0), TD(0), TM(tm),
+ : MachineFunctionPass(&ID), II(0), TD(0), TM(tm),
MCE(mce) {}
ARMCodeEmitter(TargetMachine &tm, MachineCodeEmitter &mce,
const ARMInstrInfo &ii, const TargetData &td)
- : MachineFunctionPass((intptr_t)&ID), II(&ii), TD(&td), TM(tm),
+ : MachineFunctionPass(&ID), II(&ii), TD(&td), TM(tm),
MCE(mce) {}
bool runOnMachineFunction(MachineFunction &MF);
diff --git a/lib/Target/ARM/ARMConstantIslandPass.cpp b/lib/Target/ARM/ARMConstantIslandPass.cpp
index f577de5b36..73c56182a1 100644
--- a/lib/Target/ARM/ARMConstantIslandPass.cpp
+++ b/lib/Target/ARM/ARMConstantIslandPass.cpp
@@ -129,7 +129,7 @@ namespace {
bool isThumb;
public:
static char ID;
- ARMConstantIslands() : MachineFunctionPass((intptr_t)&ID) {}
+ ARMConstantIslands() : MachineFunctionPass(&ID) {}
virtual bool runOnMachineFunction(MachineFunction &Fn);
diff --git a/lib/Target/ARM/ARMLoadStoreOptimizer.cpp b/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
index 5eeeafbac1..8bd4caa6fd 100644
--- a/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
+++ b/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
@@ -39,7 +39,7 @@ STATISTIC(NumFSTMGened, "Number of fstm instructions generated");
namespace {
struct VISIBILITY_HIDDEN ARMLoadStoreOpt : public MachineFunctionPass {
static char ID;
- ARMLoadStoreOpt() : MachineFunctionPass((intptr_t)&ID) {}
+ ARMLoadStoreOpt() : MachineFunctionPass(&ID) {}
const TargetInstrInfo *TII;
const TargetRegisterInfo *TRI;
diff --git a/lib/Target/Alpha/AlphaBranchSelector.cpp b/lib/Target/Alpha/AlphaBranchSelector.cpp
index f1d60c836f..aca8ca7348 100644
--- a/lib/Target/Alpha/AlphaBranchSelector.cpp
+++ b/lib/Target/Alpha/AlphaBranchSelector.cpp
@@ -23,7 +23,7 @@ using namespace llvm;
namespace {
struct VISIBILITY_HIDDEN AlphaBSel : public MachineFunctionPass {
static char ID;
- AlphaBSel() : MachineFunctionPass((intptr_t)&ID) {}
+ AlphaBSel() : MachineFunctionPass(&ID) {}
virtual bool runOnMachineFunction(MachineFunction &Fn);
diff --git a/lib/Target/Alpha/AlphaCodeEmitter.cpp b/lib/Target/Alpha/AlphaCodeEmitter.cpp
index 40e14135a4..b51440932f 100644
--- a/lib/Target/Alpha/AlphaCodeEmitter.cpp
+++ b/lib/Target/Alpha/AlphaCodeEmitter.cpp
@@ -39,10 +39,10 @@ namespace {
public:
static char ID;
explicit AlphaCodeEmitter(TargetMachine &tm, MachineCodeEmitter &mce)
- : MachineFunctionPass((intptr_t)&ID), II(0), TM(tm), MCE(mce) {}
+ : MachineFunctionPass(&ID), II(0), TM(tm), MCE(mce) {}
AlphaCodeEmitter(TargetMachine &tm, MachineCodeEmitter &mce,
const AlphaInstrInfo& ii)
- : MachineFunctionPass((intptr_t)&ID), II(&ii), TM(tm), MCE(mce) {}
+ : MachineFunctionPass(&ID), II(&ii), TM(tm), MCE(mce) {}
bool runOnMachineFunction(MachineFunction &MF);
diff --git a/lib/Target/Alpha/AlphaLLRP.cpp b/lib/Target/Alpha/AlphaLLRP.cpp
index f4dd199d35..7a1b78497b 100644
--- a/lib/Target/Alpha/AlphaLLRP.cpp
+++ b/lib/Target/Alpha/AlphaLLRP.cpp
@@ -39,7 +39,7 @@ namespace {
static char ID;
AlphaLLRPPass(AlphaTargetMachine &tm)
- : MachineFunctionPass((intptr_t)&ID), TM(tm) { }
+ : MachineFunctionPass(&ID), TM(tm) { }
virtual const char *getPassName() const {
return "Alpha NOP inserter";
diff --git a/lib/Target/CBackend/CBackend.cpp b/lib/Target/CBackend/CBackend.cpp
index 456bda34e7..a1222daf3f 100644
--- a/lib/Target/CBackend/CBackend.cpp
+++ b/lib/Target/CBackend/CBackend.cpp
@@ -60,7 +60,7 @@ namespace {
public:
static char ID;
CBackendNameAllUsedStructsAndMergeFunctions()
- : ModulePass((intptr_t)&ID) {}
+ : ModulePass(&ID) {}
void getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequired<FindUsedTypes>();
}
@@ -92,7 +92,7 @@ namespace {
public:
static char ID;
explicit CWriter(raw_ostream &o)
- : FunctionPass((intptr_t)&ID), Out(o), IL(0), Mang(0), LI(0),
+ : FunctionPass(&ID), Out(o), IL(0), Mang(0), LI(0),
TheModule(0), TAsm(0), TD(0) {}
virtual const char *getPassName() const { return "C backend"; }
diff --git a/lib/Target/CppBackend/CPPBackend.cpp b/lib/Target/CppBackend/CPPBackend.cpp
index 33326e14d0..b39d774932 100644
--- a/lib/Target/CppBackend/CPPBackend.cpp
+++ b/lib/Target/CppBackend/CPPBackend.cpp
@@ -103,7 +103,7 @@ namespace {
public:
static char ID;
explicit CppWriter(raw_ostream &o) :
- ModulePass((intptr_t)&ID), Out(o), uniqueNum(0), is_inline(false) {}
+ ModulePass(&ID), Out(o), uniqueNum(0), is_inline(false) {}
virtual const char *getPassName() const { return "C++ backend"; }
diff --git a/lib/Target/IA64/IA64Bundling.cpp b/lib/Target/IA64/IA64Bundling.cpp
index cac007cef2..c5bc83e134 100644
--- a/lib/Target/IA64/IA64Bundling.cpp
+++ b/lib/Target/IA64/IA64Bundling.cpp
@@ -43,7 +43,7 @@ namespace {
IA64TargetMachine &TM;
IA64BundlingPass(IA64TargetMachine &tm)
- : MachineFunctionPass((intptr_t)&ID), TM(tm) { }
+ : MachineFunctionPass(&ID), TM(tm) { }
virtual const char *getPassName() const {
return "IA64 (Itanium) Bundling Pass";
diff --git a/lib/Target/MSIL/MSILWriter.h b/lib/Target/MSIL/MSILWriter.h
index b141e23d64..c64ceeeff5 100644
--- a/lib/Target/MSIL/MSILWriter.h
+++ b/lib/Target/MSIL/MSILWriter.h
@@ -42,7 +42,7 @@ namespace {
static char ID;
MSILModule(const std::set<const Type *>*& _UsedTypes,
const TargetData*& _TD)
- : ModulePass((intptr_t)&ID), UsedTypes(_UsedTypes), TD(_TD) {}
+ : ModulePass(&ID), UsedTypes(_UsedTypes), TD(_TD) {}
void getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequired<FindUsedTypes>();
@@ -86,7 +86,7 @@ namespace {
StaticInitList;
const std::set<const Type *>* UsedTypes;
static char ID;
- MSILWriter(raw_ostream &o) : FunctionPass((intptr_t)&ID), Out(o) {
+ MSILWriter(raw_ostream &o) : FunctionPass(&ID), Out(o) {
UniqID = 0;
}
diff --git a/lib/Target/Mips/MipsDelaySlotFiller.cpp b/lib/Target/Mips/MipsDelaySlotFiller.cpp
index 881cd12929..4825b29d71 100644
--- a/lib/Target/Mips/MipsDelaySlotFiller.cpp
+++ b/lib/Target/Mips/MipsDelaySlotFiller.cpp
@@ -32,7 +32,7 @@ namespace {
static char ID;
Filler(TargetMachine &tm)
- : MachineFunctionPass((intptr_t)&ID), TM(tm), TII(tm.getInstrInfo()) { }
+ : MachineFunctionPass(&ID), TM(tm), TII(tm.getInstrInfo()) { }
virtual const char *getPassName() const {
return "Mips Delay Slot Filler";
diff --git a/lib/Target/PowerPC/PPCBranchSelector.cpp b/lib/Target/PowerPC/PPCBranchSelector.cpp
index ab988ba823..2fc5b3c025 100644
--- a/lib/Target/PowerPC/PPCBranchSelector.cpp
+++ b/lib/Target/PowerPC/PPCBranchSelector.cpp
@@ -32,7 +32,7 @@ STATISTIC(NumExpanded, "Number of branches expanded to long format");
namespace {
struct VISIBILITY_HIDDEN PPCBSel : public MachineFunctionPass {
static char ID;
- PPCBSel() : MachineFunctionPass((intptr_t)&ID) {}
+ PPCBSel() : MachineFunctionPass(&ID) {}
/// BlockSizes - The sizes of the basic blocks in the function.
std::vector<unsigned> BlockSizes;
diff --git a/lib/Target/PowerPC/PPCCodeEmitter.cpp b/lib/Target/PowerPC/PPCCodeEmitter.cpp
index 3326cf7f16..a77c726685 100644
--- a/lib/Target/PowerPC/PPCCodeEmitter.cpp
+++ b/lib/Target/PowerPC/PPCCodeEmitter.cpp
@@ -48,7 +48,7 @@ namespace {
public:
static char ID;
PPCCodeEmitter(TargetMachine &T, MachineCodeEmitter &M)
- : MachineFunctionPass((intptr_t)&ID), TM(T), MCE(M) {}
+ : MachineFunctionPass(&ID), TM(T), MCE(M) {}
const char *getPassName() const { return "PowerPC Machine Code Emitter"; }
diff --git a/lib/Target/Sparc/DelaySlotFiller.cpp b/lib/Target/Sparc/DelaySlotFiller.cpp
index 818573253f..f6648a8700 100644
--- a/lib/Target/Sparc/DelaySlotFiller.cpp
+++ b/lib/Target/Sparc/DelaySlotFiller.cpp
@@ -32,7 +32,7 @@ namespace {
static char ID;
Filler(TargetMachine &tm)
- : MachineFunctionPass((intptr_t)&ID), TM(tm), TII(tm.getInstrInfo()) { }
+ : MachineFunctionPass(&ID), TM(tm), TII(tm.getInstrInfo()) { }
virtual const char *getPassName() const {
return "SPARC Delay Slot Filler";
diff --git a/lib/Target/Sparc/FPMover.cpp b/lib/Target/Sparc/FPMover.cpp
index 016215b971..a542fc5198 100644
--- a/lib/Target/Sparc/FPMover.cpp
+++ b/lib/Target/Sparc/FPMover.cpp
@@ -34,7 +34,7 @@ namespace {
static char ID;
FPMover(TargetMachine &tm)
- : MachineFunctionPass((intptr_t)&ID), TM(tm) { }
+ : MachineFunctionPass(&ID), TM(tm) { }
virtual const char *getPassName() const {
return "Sparc Double-FP Move Fixer";
diff --git a/lib/Target/TargetData.cpp b/lib/Target/TargetData.cpp
index f83adefbee..650f91eee1 100644
--- a/lib/Target/TargetData.cpp
+++ b/lib/Target/TargetData.cpp
@@ -232,7 +232,7 @@ void TargetData::init(const std::string &TargetDescription) {
}
TargetData::TargetData(const Module *M)
- : ImmutablePass((intptr_t)&ID) {
+ : ImmutablePass(&ID) {
init(M->getDataLayout());
}
diff --git a/lib/Target/X86/X86CodeEmitter.cpp b/lib/Target/X86/X86CodeEmitter.cpp
index c3a1ed921a..1c81b4b6fc 100644
--- a/lib/Target/X86/X86CodeEmitter.cpp
+++ b/lib/Target/X86/X86CodeEmitter.cpp
@@ -46,12 +46,12 @@ namespace {
public:
static char ID;
explicit Emitter(X86TargetMachine &tm, MachineCodeEmitter &mce)
- : MachineFunctionPass((intptr_t)&ID), II(0), TD(0), TM(tm),
+ : MachineFunctionPass(&ID), II(0), TD(0), TM(tm),
MCE(mce), PICBaseOffset(0), Is64BitMode(false),
IsPIC(TM.getRelocationModel() == Reloc::PIC_) {}
Emitter(X86TargetMachine &tm, MachineCodeEmitter &mce,
const X86InstrInfo &ii, const TargetData &td, bool is64)
- : MachineFunctionPass((intptr_t)&ID), II(&ii), TD(&td), TM(tm),
+ : MachineFunctionPass(&ID), II(&ii), TD(&td), TM(tm),
MCE(mce), PICBaseOffset(0), Is64BitMode(is64),
IsPIC(TM.getRelocationModel() == Reloc::PIC_) {}
diff --git a/lib/Target/X86/X86FloatingPoint.cpp b/lib/Target/X86/X86FloatingPoint.cpp
index 7dadd44b1c..5da02c6474 100644
--- a/lib/Target/X86/X86FloatingPoint.cpp
+++ b/lib/Target/X86/X86FloatingPoint.cpp
@@ -53,7 +53,7 @@ STATISTIC(NumFP , "Number of floating point instructions");
namespace {
struct VISIBILITY_HIDDEN FPS : public MachineFunctionPass {
static char ID;
- FPS() : MachineFunctionPass((intptr_t)&ID) {}
+ FPS() : MachineFunctionPass(&ID) {}
virtual bool runOnMachineFunction(MachineFunction &MF);
diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp
index 4f335ab762..d7bf93974e 100644
--- a/lib/Target/X86/X86RegisterInfo.cpp
+++ b/lib/Target/X86/X86RegisterInfo.cpp
@@ -1118,7 +1118,7 @@ unsigned getX86SubSuperRegister(unsigned Reg, MVT VT, bool High) {
namespace {
struct VISIBILITY_HIDDEN MSAC : public MachineFunctionPass {
static char ID;
- MSAC() : MachineFunctionPass((intptr_t)&ID) {}
+ MSAC() : MachineFunctionPass(&ID) {}
virtual bool runOnMachineFunction(MachineFunction &MF) {
MachineFrameInfo *FFI = MF.getFrameInfo();
generated by cgit v1.2.3-18-g5258 (git 2.32.0) at 2025-04-29 06:35:09 +0000