1 files changed, 4 insertions, 5 deletions
diff --git a/lib/Target/X86/X86Subtarget.cpp b/lib/Target/X86/X86Subtarget.cpp
index f181b38cb2..7d1f972b4e 100644
--- a/lib/Target/X86/X86Subtarget.cpp
+++ b/lib/Target/X86/X86Subtarget.cpp
@@ -76,15 +76,14 @@ bool X86Subtarget::GVRequiresExtraLoad(const GlobalValue* GV,
 /// cases where GVRequiresExtraLoad is true.  Some variations of PIC require
 /// a register, but not an extra load.
 bool X86Subtarget::GVRequiresRegister(const GlobalValue *GV,
-                                      const TargetMachine& TM,
-                                      bool isDirectCall) const {
-  if (GVRequiresExtraLoad(GV, TM, isDirectCall))
+                                      const TargetMachine &TM) const {
+  if (GVRequiresExtraLoad(GV, TM, false))
     return true;
+  
   // Code below here need only consider cases where GVRequiresExtraLoad
   // returns false.
   if (TM.getRelocationModel() == Reloc::PIC_)
-    return !isDirectCall && 
-      (GV->hasLocalLinkage() || GV->hasExternalLinkage());
+    return GV->hasLocalLinkage() || GV->hasExternalLinkage();
   return false;
 }