1 files changed, 0 insertions, 35 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 395338a8f3..0f97c24c36 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -4092,41 +4092,6 @@ bool X86TargetLowering::isLegalAddressingMode(const AddrMode &AM,
 }
 
 
-/// isLegalAddressImmediate - Return true if the integer value can be used
-/// as the offset of the target addressing mode for load / store of the
-/// given type.
-bool X86TargetLowering::isLegalAddressImmediate(int64_t V,const Type *Ty) const{
-  // X86 allows a sign-extended 32-bit immediate field.
-  return (V > -(1LL << 32) && V < (1LL << 32)-1);
-}
-
-/// isLegalAddressImmediate - Return true if the GlobalValue can be used as
-/// the offset of the target addressing mode.
-bool X86TargetLowering::isLegalAddressImmediate(GlobalValue *GV) const {
-  // In 64-bit mode, GV is 64-bit so it won't fit in the 32-bit displacement 
-  // field unless we are in small code model.
-  if (Subtarget->is64Bit() &&
-      getTargetMachine().getCodeModel() != CodeModel::Small)
-    return false;
-  
-  return (!Subtarget->GVRequiresExtraLoad(GV, getTargetMachine(), false));
-}
-
-/// isLegalAddressScale - Return true if the integer value can be used as the
-/// scale of the target addressing mode for load / store of the given type.
-bool X86TargetLowering::isLegalAddressScale(int64_t S, const Type *Ty) const {
-  switch (S) {
-  default:
-    return false;
-  case 2: case 4: case 8:
-    return true;
-  // FIXME: These require both scale + index last and thus more expensive.
-  // How to tell LSR to try for 2, 4, 8 first?
-  case 3: case 5: case 9:
-    return true;
-  }
-}
-
 /// isShuffleMaskLegal - Targets can use this to indicate that they only
 /// support *some* VECTOR_SHUFFLE operations, those with specific masks.
 /// By default, if a target supports the VECTOR_SHUFFLE node, all mask values