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-rw-r--r--lib/Target/Sparc/SparcAsmPrinter.cpp8
-rw-r--r--lib/Target/Sparc/SparcISelDAGToDAG.cpp13
2 files changed, 20 insertions, 1 deletions
diff --git a/lib/Target/Sparc/SparcAsmPrinter.cpp b/lib/Target/Sparc/SparcAsmPrinter.cpp
index 592588bdbe..ea4971c995 100644
--- a/lib/Target/Sparc/SparcAsmPrinter.cpp
+++ b/lib/Target/Sparc/SparcAsmPrinter.cpp
@@ -186,7 +186,13 @@ void SparcV8AsmPrinter::printOperand(const MachineInstr *MI, int opNum) {
void SparcV8AsmPrinter::printMemOperand(const MachineInstr *MI, int opNum) {
printOperand(MI, opNum);
O << "+";
- printOperand(MI, opNum+1);
+ if (MI->getOperand(opNum+1).getType() == MachineOperand::MO_GlobalAddress) {
+ O << "%lo(";
+ printOperand(MI, opNum+1);
+ O << ")";
+ } else {
+ printOperand(MI, opNum+1);
+ }
}
diff --git a/lib/Target/Sparc/SparcISelDAGToDAG.cpp b/lib/Target/Sparc/SparcISelDAGToDAG.cpp
index 73b6722c6c..aa558d189c 100644
--- a/lib/Target/Sparc/SparcISelDAGToDAG.cpp
+++ b/lib/Target/Sparc/SparcISelDAGToDAG.cpp
@@ -309,6 +309,9 @@ bool SparcV8DAGToDAGISel::SelectADDRrr(SDOperand Addr, SDOperand &R1,
if (isa<ConstantSDNode>(Addr.getOperand(1)) &&
Predicate_simm13(Addr.getOperand(1).Val))
return false; // Let the reg+imm pattern catch this!
+ if (Addr.getOperand(0).getOpcode() == V8ISD::Lo ||
+ Addr.getOperand(1).getOpcode() == V8ISD::Lo)
+ return false; // Let the reg+imm pattern catch this!
R1 = Select(Addr.getOperand(0));
R2 = Select(Addr.getOperand(1));
return true;
@@ -328,6 +331,16 @@ bool SparcV8DAGToDAGISel::SelectADDRri(SDOperand Addr, SDOperand &Base,
Offset = CurDAG->getTargetConstant(CN->getValue(), MVT::i32);
return true;
}
+ if (Addr.getOperand(0).getOpcode() == V8ISD::Lo) {
+ Base = Select(Addr.getOperand(1));
+ Offset = Addr.getOperand(0).getOperand(0);
+ return true;
+ }
+ if (Addr.getOperand(1).getOpcode() == V8ISD::Lo) {
+ Base = Select(Addr.getOperand(0));
+ Offset = Addr.getOperand(1).getOperand(0);
+ return true;
+ }
}
Base = Select(Addr);
Offset = CurDAG->getTargetConstant(0, MVT::i32);