diff options
Diffstat (limited to 'lib/Target/Sparc/SparcInstrInfo.cpp')
| -rw-r--r-- | lib/Target/Sparc/SparcInstrInfo.cpp | 24 |
1 files changed, 23 insertions, 1 deletions
diff --git a/lib/Target/Sparc/SparcInstrInfo.cpp b/lib/Target/Sparc/SparcInstrInfo.cpp index 86af68d766..5a64a4428c 100644 --- a/lib/Target/Sparc/SparcInstrInfo.cpp +++ b/lib/Target/Sparc/SparcInstrInfo.cpp @@ -12,6 +12,7 @@ //===----------------------------------------------------------------------===// #include "SparcInstrInfo.h" +#include "SparcSubtarget.h" #include "Sparc.h" #include "llvm/ADT/STLExtras.h" #include "llvm/CodeGen/MachineInstrBuilder.h" @@ -20,7 +21,7 @@ using namespace llvm; SparcInstrInfo::SparcInstrInfo(SparcSubtarget &ST) : TargetInstrInfo(SparcInsts, array_lengthof(SparcInsts)), - RI(ST, *this) { + RI(ST, *this), Subtarget(ST) { } static bool isZeroImm(const MachineOperand &op) { @@ -107,3 +108,24 @@ SparcInstrInfo::InsertBranch(MachineBasicBlock &MBB,MachineBasicBlock *TBB, BuildMI(&MBB, get(SP::BA)).addMBB(TBB); return 1; } + +void SparcInstrInfo::copyRegToReg(MachineBasicBlock &MBB, + MachineBasicBlock::iterator I, + unsigned DestReg, unsigned SrcReg, + const TargetRegisterClass *DestRC, + const TargetRegisterClass *SrcRC) const { + if (DestRC != SrcRC) { + cerr << "Not yet supported!"; + abort(); + } + + if (DestRC == SP::IntRegsRegisterClass) + BuildMI(MBB, I, get(SP::ORrr), DestReg).addReg(SP::G0).addReg(SrcReg); + else if (DestRC == SP::FPRegsRegisterClass) + BuildMI(MBB, I, get(SP::FMOVS), DestReg).addReg(SrcReg); + else if (DestRC == SP::DFPRegsRegisterClass) + BuildMI(MBB, I, get(Subtarget.isV9() ? SP::FMOVD : SP::FpMOVD),DestReg) + .addReg(SrcReg); + else + assert (0 && "Can't copy this register"); +} |