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path: root/lib/Target/Sparc/InstSelectSimple.cpp
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Diffstat (limited to 'lib/Target/Sparc/InstSelectSimple.cpp')
-rw-r--r--lib/Target/Sparc/InstSelectSimple.cpp19
1 files changed, 17 insertions, 2 deletions
diff --git a/lib/Target/Sparc/InstSelectSimple.cpp b/lib/Target/Sparc/InstSelectSimple.cpp
index 982ac86532..43f2646d1e 100644
--- a/lib/Target/Sparc/InstSelectSimple.cpp
+++ b/lib/Target/Sparc/InstSelectSimple.cpp
@@ -232,8 +232,8 @@ void V8ISel::copyConstantToRegister(MachineBasicBlock *MBB,
// Copy the value into the register pair.
// R = top(more-significant) half, R+1 = bottom(less-significant) half
uint64_t Val = cast<ConstantInt>(C)->getRawValue();
- unsigned topHalf = Val & 0xffffffffU;
- unsigned bottomHalf = Val >> 32;
+ unsigned bottomHalf = Val & 0xffffffffU;
+ unsigned topHalf = Val >> 32;
unsigned HH = topHalf >> 10;
unsigned HM = topHalf & 0x03ff;
unsigned LM = bottomHalf >> 10;
@@ -565,6 +565,17 @@ void V8ISel::emitCastOperation(MachineBasicBlock *BB,
break;
}
}
+ } else if (newTyClass == cLong) {
+ if (oldTyClass == cLong) {
+ // Just copy it
+ BuildMI (*BB, IP, V8::ORrr, 2, DestReg).addReg (V8::G0).addReg (SrcReg);
+ BuildMI (*BB, IP, V8::ORrr, 2, DestReg+1).addReg (V8::G0)
+ .addReg (SrcReg+1);
+ } else {
+ std::cerr << "Cast still unsupported: SrcTy = "
+ << *SrcTy << ", DestTy = " << *DestTy << "\n";
+ abort ();
+ }
} else {
std::cerr << "Cast still unsupported: SrcTy = "
<< *SrcTy << ", DestTy = " << *DestTy << "\n";
@@ -705,6 +716,10 @@ void V8ISel::visitReturnInst(ReturnInst &I) {
case cFloat:
BuildMI (BB, V8::FMOVS, 2, V8::F0).addReg(RetValReg);
break;
+ case cLong:
+ BuildMI (BB, V8::ORrr, 2, V8::I0).addReg(V8::G0).addReg(RetValReg);
+ BuildMI (BB, V8::ORrr, 2, V8::I1).addReg(V8::G0).addReg(RetValReg+1);
+ break;
default:
std::cerr << "Return instruction of this type not handled: " << I;
abort ();