diff options
Diffstat (limited to 'lib/Target/Mips/MipsSubtarget.cpp')
-rw-r--r-- | lib/Target/Mips/MipsSubtarget.cpp | 18 |
1 files changed, 16 insertions, 2 deletions
diff --git a/lib/Target/Mips/MipsSubtarget.cpp b/lib/Target/Mips/MipsSubtarget.cpp index 2bfb82a310..31e777da95 100644 --- a/lib/Target/Mips/MipsSubtarget.cpp +++ b/lib/Target/Mips/MipsSubtarget.cpp @@ -14,15 +14,29 @@ #include "MipsSubtarget.h" #include "Mips.h" #include "MipsGenSubtarget.inc" +#include "llvm/Module.h" using namespace llvm; MipsSubtarget::MipsSubtarget(const TargetMachine &TM, const Module &M, const std::string &FS, bool little) : - IsMipsIII(false), - IsLittle(little) + MipsArchVersion(Mips1), MipsABI(O32), IsLittle(little), IsSingleFloat(false), + IsFP64bit(false), IsGP64bit(false), HasAllegrexVFPU(false), IsAllegrex(false) { std::string CPU = "mips1"; // Parse features string. ParseSubtargetFeatures(FS, CPU); + + // When only the target triple is specified and is + // a allegrex target, set the features. We also match + // big and little endian allegrex cores (dont really + // know if a big one exists) + const std::string& TT = M.getTargetTriple(); + if (TT.find("mipsallegrex") != std::string::npos) { + MipsABI = EABI; + IsSingleFloat = true; + MipsArchVersion = Mips2; + HasAllegrexVFPU = true; // Enables Allegrex Vector FPU (not supported yet) + IsAllegrex = true; + } } |