diff options
Diffstat (limited to 'lib/Target/IA64')
30 files changed, 0 insertions, 4372 deletions
diff --git a/lib/Target/IA64/AsmPrinter/CMakeLists.txt b/lib/Target/IA64/AsmPrinter/CMakeLists.txt deleted file mode 100644 index cff386e0ec..0000000000 --- a/lib/Target/IA64/AsmPrinter/CMakeLists.txt +++ /dev/null @@ -1,9 +0,0 @@ -include_directories(
- ${CMAKE_CURRENT_BINARY_DIR}/..
- ${CMAKE_CURRENT_SOURCE_DIR}/..
- )
-
-add_llvm_library(LLVMIA64AsmPrinter
- IA64AsmPrinter.cpp - )
-add_dependencies(LLVMIA64AsmPrinter IA64CodeGenTable_gen)
\ No newline at end of file diff --git a/lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp b/lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp deleted file mode 100644 index 1634a19b8c..0000000000 --- a/lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp +++ /dev/null @@ -1,377 +0,0 @@ -//===-- IA64AsmPrinter.cpp - Print out IA64 LLVM as assembly --------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file contains a printer that converts from our internal representation -// of machine-dependent LLVM code to assembly accepted by the GNU binutils 'gas' -// assembler. The Intel 'ias' and HP-UX 'as' assemblers *may* choke on this -// output, but if so that's a bug I'd like to hear about: please file a bug -// report in bugzilla. FYI, the not too bad 'ias' assembler is bundled with -// the Intel C/C++ compiler for Itanium Linux. -// -//===----------------------------------------------------------------------===// - -#define DEBUG_TYPE "asm-printer" -#include "IA64.h" -#include "IA64TargetMachine.h" -#include "llvm/Module.h" -#include "llvm/MDNode.h" -#include "llvm/Type.h" -#include "llvm/CodeGen/AsmPrinter.h" -#include "llvm/CodeGen/DwarfWriter.h" -#include "llvm/CodeGen/MachineFunctionPass.h" -#include "llvm/Target/TargetAsmInfo.h" -#include "llvm/Target/TargetRegistry.h" -#include "llvm/Support/ErrorHandling.h" -#include "llvm/Support/FormattedStream.h" -#include "llvm/Support/Mangler.h" -#include "llvm/ADT/Statistic.h" -using namespace llvm; - -STATISTIC(EmittedInsts, "Number of machine instrs printed"); - -namespace { - class IA64AsmPrinter : public AsmPrinter { - std::set<std::string> ExternalFunctionNames, ExternalObjectNames; - public: - explicit IA64AsmPrinter(formatted_raw_ostream &O, TargetMachine &TM, - const TargetAsmInfo *T, bool V) - : AsmPrinter(O, TM, T, V) {} - - virtual const char *getPassName() const { - return "IA64 Assembly Printer"; - } - - /// printInstruction - This method is automatically generated by tablegen - /// from the instruction set description. This method returns true if the - /// machine instruction was sufficiently described to print it, otherwise it - /// returns false. - bool printInstruction(const MachineInstr *MI); - - // This method is used by the tablegen'erated instruction printer. - void printOperand(const MachineInstr *MI, unsigned OpNo){ - const MachineOperand &MO = MI->getOperand(OpNo); - if (MO.getType() == MachineOperand::MO_Register) { - assert(TargetRegisterInfo::isPhysicalRegister(MO.getReg()) && - "Not physref??"); - //XXX Bug Workaround: See note in Printer::doInitialization about %. - O << TM.getRegisterInfo()->get(MO.getReg()).AsmName; - } else { - printOp(MO); - } - } - - void printS8ImmOperand(const MachineInstr *MI, unsigned OpNo) { - int val=(unsigned int)MI->getOperand(OpNo).getImm(); - if(val>=128) val=val-256; // if negative, flip sign - O << val; - } - void printS14ImmOperand(const MachineInstr *MI, unsigned OpNo) { - int val=(unsigned int)MI->getOperand(OpNo).getImm(); - if(val>=8192) val=val-16384; // if negative, flip sign - O << val; - } - void printS22ImmOperand(const MachineInstr *MI, unsigned OpNo) { - int val=(unsigned int)MI->getOperand(OpNo).getImm(); - if(val>=2097152) val=val-4194304; // if negative, flip sign - O << val; - } - void printU64ImmOperand(const MachineInstr *MI, unsigned OpNo) { - O << (uint64_t)MI->getOperand(OpNo).getImm(); - } - void printS64ImmOperand(const MachineInstr *MI, unsigned OpNo) { -// XXX : nasty hack to avoid GPREL22 "relocation truncated to fit" linker -// errors - instead of add rX = @gprel(CPI<whatever>), r1;; we now -// emit movl rX = @gprel(CPI<whatever);; -// add rX = rX, r1; -// this gives us 64 bits instead of 22 (for the add long imm) to play -// with, which shuts up the linker. The problem is that the constant -// pool entries aren't immediates at this stage, so we check here. -// If it's an immediate, print it the old fashioned way. If it's -// not, we print it as a constant pool index. - if (MI->getOperand(OpNo).isImm()) { - O << (int64_t)MI->getOperand(OpNo).getImm(); - } else { // this is a constant pool reference: FIXME: assert this - printOp(MI->getOperand(OpNo)); - } - } - - void printGlobalOperand(const MachineInstr *MI, unsigned OpNo) { - printOp(MI->getOperand(OpNo), false); // this is NOT a br.call instruction - } - - void printCallOperand(const MachineInstr *MI, unsigned OpNo) { - printOp(MI->getOperand(OpNo), true); // this is a br.call instruction - } - - void printMachineInstruction(const MachineInstr *MI); - void printOp(const MachineOperand &MO, bool isBRCALLinsn= false); - void PrintGlobalVariable(const GlobalVariable *GVar); - bool runOnMachineFunction(MachineFunction &F); - bool doInitialization(Module &M); - bool doFinalization(Module &M); - }; -} // end of anonymous namespace - - -// Include the auto-generated portion of the assembly writer. -#include "IA64GenAsmWriter.inc" - -/// runOnMachineFunction - This uses the printMachineInstruction() -/// method to print assembly for each instruction. -/// -bool IA64AsmPrinter::runOnMachineFunction(MachineFunction &MF) { - this->MF = &MF; - - SetupMachineFunction(MF); - O << "\n\n"; - - // Print out constants referenced by the function - EmitConstantPool(MF.getConstantPool()); - - const Function *F = MF.getFunction(); - SwitchToSection(TAI->SectionForGlobal(F)); - - // Print out labels for the function. - EmitAlignment(MF.getAlignment()); - O << "\t.global\t" << CurrentFnName << '\n'; - - printVisibility(CurrentFnName, F->getVisibility()); - - O << "\t.type\t" << CurrentFnName << ", @function\n"; - O << CurrentFnName << ":\n"; - - // Print out code for the function. - for (MachineFunction::const_iterator I = MF.begin(), E = MF.end(); - I != E; ++I) { - // Print a label for the basic block if there are any predecessors. - if (!I->pred_empty()) { - printBasicBlockLabel(I, true, true); - O << '\n'; - } - for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end(); - II != E; ++II) { - // Print the assembly for the instruction. - printMachineInstruction(II); - } - } - - // We didn't modify anything. - return false; -} - -void IA64AsmPrinter::printOp(const MachineOperand &MO, - bool isBRCALLinsn /* = false */) { - const TargetRegisterInfo &RI = *TM.getRegisterInfo(); - switch (MO.getType()) { - case MachineOperand::MO_Register: - O << RI.get(MO.getReg()).AsmName; - return; - - case MachineOperand::MO_Immediate: - O << MO.getImm(); - return; - case MachineOperand::MO_MachineBasicBlock: - printBasicBlockLabel(MO.getMBB()); - return; - case MachineOperand::MO_ConstantPoolIndex: { - O << "@gprel(" << TAI->getPrivateGlobalPrefix() - << "CPI" << getFunctionNumber() << "_" << MO.getIndex() << ")"; - return; - } - - case MachineOperand::MO_GlobalAddress: { - - // functions need @ltoff(@fptr(fn_name)) form - GlobalValue *GV = MO.getGlobal(); - Function *F = dyn_cast<Function>(GV); - - bool Needfptr=false; // if we're computing an address @ltoff(X), do - // we need to decorate it so it becomes - // @ltoff(@fptr(X)) ? - if (F && !isBRCALLinsn /*&& F->isDeclaration()*/) - Needfptr=true; - - // if this is the target of a call instruction, we should define - // the function somewhere (GNU gas has no problem without this, but - // Intel ias rightly complains of an 'undefined symbol') - - if (F /*&& isBRCALLinsn*/ && F->isDeclaration()) - ExternalFunctionNames.insert(Mang->getMangledName(MO.getGlobal())); - else - if (GV->isDeclaration()) // e.g. stuff like 'stdin' - ExternalObjectNames.insert(Mang->getMangledName(MO.getGlobal())); - - if (!isBRCALLinsn) - O << "@ltoff("; - if (Needfptr) - O << "@fptr("; - O << Mang->getMangledName(MO.getGlobal()); - - if (Needfptr && !isBRCALLinsn) - O << "#))"; // close both fptr( and ltoff( - else { - if (Needfptr) - O << "#)"; // close only fptr( - if (!isBRCALLinsn) - O << "#)"; // close only ltoff( - } - - int Offset = MO.getOffset(); - if (Offset > 0) - O << " + " << Offset; - else if (Offset < 0) - O << " - " << -Offset; - return; - } - case MachineOperand::MO_ExternalSymbol: - O << MO.getSymbolName(); - ExternalFunctionNames.insert(MO.getSymbolName()); - return; - default: - O << "<AsmPrinter: unknown operand type: " << MO.getType() << " >"; return; - } -} - -/// printMachineInstruction -- Print out a single IA64 LLVM instruction -/// MI to the current output stream. -/// -void IA64AsmPrinter::printMachineInstruction(const MachineInstr *MI) { - ++EmittedInsts; - - // Call the autogenerated instruction printer routines. - printInstruction(MI); -} - -bool IA64AsmPrinter::doInitialization(Module &M) { - bool Result = AsmPrinter::doInitialization(M); - - O << "\n.ident \"LLVM-ia64\"\n\n" - << "\t.psr lsb\n" // should be "msb" on HP-UX, for starters - << "\t.radix C\n" - << "\t.psr abi64\n"; // we only support 64 bits for now - return Result; -} - -void IA64AsmPrinter::PrintGlobalVariable(const GlobalVariable *GVar) { - const TargetData *TD = TM.getTargetData(); - - if (!GVar->hasInitializer()) - return; // External global require no code - - // Check to see if this is a special global used by LLVM, if so, emit it. - if (EmitSpecialLLVMGlobal(GVar)) - return; - - O << "\n\n"; - std::string name = Mang->getMangledName(GVar); - Constant *C = GVar->getInitializer(); - if (isa<MDNode>(C) || isa<MDString>(C)) - return; - unsigned Size = TD->getTypeAllocSize(C->getType()); - unsigned Align = TD->getPreferredAlignmentLog(GVar); - - printVisibility(name, GVar->getVisibility()); - - SwitchToSection(TAI->SectionForGlobal(GVar)); - - if (C->isNullValue() && !GVar->hasSection()) { - if (!GVar->isThreadLocal() && - (GVar->hasLocalLinkage() || GVar->isWeakForLinker())) { - if (Size == 0) Size = 1; // .comm Foo, 0 is undefined, avoid it. - - if (GVar->hasLocalLinkage()) { - O << "\t.lcomm " << name << "#," << Size - << ',' << (1 << Align); - O << '\n'; - } else { - O << "\t.common " << name << "#," << Size - << ',' << (1 << Align); - O << '\n'; - } - - return; - } - } - - switch (GVar->getLinkage()) { - case GlobalValue::LinkOnceAnyLinkage: - case GlobalValue::LinkOnceODRLinkage: - case GlobalValue::CommonLinkage: - case GlobalValue::WeakAnyLinkage: - case GlobalValue::WeakODRLinkage: - // Nonnull linkonce -> weak - O << "\t.weak " << name << '\n'; - break; - case GlobalValue::AppendingLinkage: - // FIXME: appending linkage variables should go into a section of - // their name or something. For now, just emit them as external. - case GlobalValue::ExternalLinkage: - // If external or appending, declare as a global symbol - O << TAI->getGlobalDirective() << name << '\n'; - // FALL THROUGH - case GlobalValue::InternalLinkage: - case GlobalValue::PrivateLinkage: - case GlobalValue::LinkerPrivateLinkage: - break; - case GlobalValue::GhostLinkage: - llvm_unreachable("GhostLinkage cannot appear in IA64AsmPrinter!"); - case GlobalValue::DLLImportLinkage: - llvm_unreachable("DLLImport linkage is not supported by this target!"); - case GlobalValue::DLLExportLinkage: - llvm_unreachable("DLLExport linkage is not supported by this target!"); - default: - llvm_unreachable("Unknown linkage type!"); - } - - EmitAlignment(Align, GVar); - - if (TAI->hasDotTypeDotSizeDirective()) { - O << "\t.type " << name << ",@object\n"; - O << "\t.size " << name << ',' << Size << '\n'; - } - - O << name << ":\n"; - EmitGlobalConstant(C); -} - - -bool IA64AsmPrinter::doFinalization(Module &M) { - // we print out ".global X \n .type X, @function" for each external function - O << "\n\n// br.call targets referenced (and not defined) above: \n"; - for (std::set<std::string>::iterator i = ExternalFunctionNames.begin(), - e = ExternalFunctionNames.end(); i!=e; ++i) { - O << "\t.global " << *i << "\n\t.type " << *i << ", @function\n"; - } - O << "\n\n"; - - // we print out ".global X \n .type X, @object" for each external object - O << "\n\n// (external) symbols referenced (and not defined) above: \n"; - for (std::set<std::string>::iterator i = ExternalObjectNames.begin(), - e = ExternalObjectNames.end(); i!=e; ++i) { - O << "\t.global " << *i << "\n\t.type " << *i << ", @object\n"; - } - O << "\n\n"; - - return AsmPrinter::doFinalization(M); -} - -/// createIA64CodePrinterPass - Returns a pass that prints the IA64 -/// assembly code for a MachineFunction to the given output stream, using -/// the given target machine description. -/// -FunctionPass *llvm::createIA64CodePrinterPass(formatted_raw_ostream &o, - TargetMachine &tm, - bool verbose) { - return new IA64AsmPrinter(o, tm, tm.getTargetAsmInfo(), verbose); -} - -// Force static initialization. -extern "C" void LLVMInitializeIA64AsmPrinter() { - TargetRegistry::RegisterAsmPrinter(TheIA64Target, createIA64CodePrinterPass); -} diff --git a/lib/Target/IA64/AsmPrinter/Makefile b/lib/Target/IA64/AsmPrinter/Makefile deleted file mode 100644 index 12880f36f7..0000000000 --- a/lib/Target/IA64/AsmPrinter/Makefile +++ /dev/null @@ -1,17 +0,0 @@ -##===- lib/Target/IA64/AsmPrinter/Makefile -----------------*- Makefile -*-===## -# -# The LLVM Compiler Infrastructure -# -# This file is distributed under the University of Illinois Open Source -# License. See LICENSE.TXT for details. -# -##===----------------------------------------------------------------------===## - -LEVEL = ../../../.. -LIBRARYNAME = LLVMIA64AsmPrinter - -# Hack: we need to include 'main' IA64 target directory to grab -# private headers -CPPFLAGS = -I$(PROJ_OBJ_DIR)/.. -I$(PROJ_SRC_DIR)/.. - -include $(LEVEL)/Makefile.common diff --git a/lib/Target/IA64/CMakeLists.txt b/lib/Target/IA64/CMakeLists.txt deleted file mode 100644 index 638ed2e900..0000000000 --- a/lib/Target/IA64/CMakeLists.txt +++ /dev/null @@ -1,22 +0,0 @@ -set(LLVM_TARGET_DEFINITIONS IA64.td) - -tablegen(IA64GenRegisterInfo.h.inc -gen-register-desc-header) -tablegen(IA64GenRegisterNames.inc -gen-register-enums) -tablegen(IA64GenRegisterInfo.inc -gen-register-desc) -tablegen(IA64GenInstrNames.inc -gen-instr-enums) -tablegen(IA64GenInstrInfo.inc -gen-instr-desc) -tablegen(IA64GenAsmWriter.inc -gen-asm-writer) -tablegen(IA64GenDAGISel.inc -gen-dag-isel) - -add_llvm_target(IA64CodeGen - IA64Bundling.cpp - IA64InstrInfo.cpp - IA64ISelDAGToDAG.cpp - IA64ISelLowering.cpp - IA64RegisterInfo.cpp - IA64Subtarget.cpp - IA64TargetAsmInfo.cpp - IA64TargetMachine.cpp - ) - -target_link_libraries (LLVMIA64CodeGen LLVMSelectionDAG) diff --git a/lib/Target/IA64/IA64.h b/lib/Target/IA64/IA64.h deleted file mode 100644 index 2f986b3cfe..0000000000 --- a/lib/Target/IA64/IA64.h +++ /dev/null @@ -1,59 +0,0 @@ -//===-- IA64.h - Top-level interface for IA64 representation ------*- C++ -*-===// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file contains the entry points for global functions defined in the IA64 -// target library, as used by the LLVM JIT. -// -//===----------------------------------------------------------------------===// - -#ifndef TARGET_IA64_H -#define TARGET_IA64_H - -#include "llvm/Target/TargetMachine.h" - -namespace llvm { - -class IA64TargetMachine; -class FunctionPass; -class formatted_raw_ostream; - -/// createIA64DAGToDAGInstructionSelector - This pass converts an LLVM -/// function into IA64 machine code in a sane, DAG->DAG transform. -/// -FunctionPass *createIA64DAGToDAGInstructionSelector(IA64TargetMachine &TM); - -/// createIA64BundlingPass - This pass adds stop bits and bundles -/// instructions. -/// -FunctionPass *createIA64BundlingPass(IA64TargetMachine &TM); - -/// createIA64CodePrinterPass - Returns a pass that prints the IA64 -/// assembly code for a MachineFunction to the given output stream, -/// using the given target machine description. This should work -/// regardless of whether the function is in SSA form. -/// -FunctionPass *createIA64CodePrinterPass(formatted_raw_ostream &o, - TargetMachine &tm, - bool verbose); - -extern Target TheIA64Target; - -} // End llvm namespace - -// Defines symbolic names for IA64 registers. This defines a mapping from -// register name to register number. -// -#include "IA64GenRegisterNames.inc" - -// Defines symbolic names for the IA64 instructions. -// -#include "IA64GenInstrNames.inc" - -#endif - - diff --git a/lib/Target/IA64/IA64.td b/lib/Target/IA64/IA64.td deleted file mode 100644 index c469281ab1..0000000000 --- a/lib/Target/IA64/IA64.td +++ /dev/null @@ -1,39 +0,0 @@ -//===-- IA64.td - Target definition file for Intel IA64 -------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This is a target description file for the Intel IA64 architecture, -// also known variously as ia64, IA-64, IPF, "the Itanium architecture" etc. -// -//===----------------------------------------------------------------------===// - -// Get the target-independent interfaces which we are implementing... -// -include "llvm/Target/Target.td" - -//===----------------------------------------------------------------------===// -// Register File Description -//===----------------------------------------------------------------------===// - -include "IA64RegisterInfo.td" - -//===----------------------------------------------------------------------===// -// Instruction Descriptions -//===----------------------------------------------------------------------===// - -include "IA64InstrInfo.td" - -def IA64InstrInfo : InstrInfo { } - -def IA64 : Target { - // Our instruction set - let InstructionSet = IA64InstrInfo; - -} - - diff --git a/lib/Target/IA64/IA64Bundling.cpp b/lib/Target/IA64/IA64Bundling.cpp deleted file mode 100644 index 3a9ba6ca3f..0000000000 --- a/lib/Target/IA64/IA64Bundling.cpp +++ /dev/null @@ -1,118 +0,0 @@ -//===-- IA64Bundling.cpp - IA-64 instruction bundling pass. ------------ --===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// Add stops where required to prevent read-after-write and write-after-write -// dependencies, for both registers and memory addresses. There are exceptions: -// -// - Compare instructions (cmp*, tbit, tnat, fcmp, frcpa) are OK with -// WAW dependencies so long as they all target p0, or are of parallel -// type (.and*/.or*) -// -// FIXME: bundling, for now, is left to the assembler. -// FIXME: this might be an appropriate place to translate between different -// instructions that do the same thing, if this helps bundling. -// -//===----------------------------------------------------------------------===// - -#define DEBUG_TYPE "ia64-codegen" -#include "IA64.h" -#include "IA64InstrInfo.h" -#include "IA64TargetMachine.h" -#include "llvm/CodeGen/MachineFunctionPass.h" -#include "llvm/CodeGen/MachineInstrBuilder.h" -#include "llvm/ADT/SetOperations.h" -#include "llvm/ADT/Statistic.h" -#include "llvm/Support/Debug.h" -#include <set> -using namespace llvm; - -STATISTIC(StopBitsAdded, "Number of stop bits added"); - -namespace { - struct IA64BundlingPass : public MachineFunctionPass { - static char ID; - /// Target machine description which we query for reg. names, data - /// layout, etc. - /// - IA64TargetMachine &TM; - - IA64BundlingPass(IA64TargetMachine &tm) - : MachineFunctionPass(&ID), TM(tm) { } - - virtual const char *getPassName() const { - return "IA64 (Itanium) Bundling Pass"; - } - - bool runOnMachineBasicBlock(MachineBasicBlock &MBB); - bool runOnMachineFunction(MachineFunction &F) { - bool Changed = false; - for (MachineFunction::iterator FI = F.begin(), FE = F.end(); - FI != FE; ++FI) - Changed |= runOnMachineBasicBlock(*FI); - return Changed; - } - - // XXX: ugly global, but pending writes can cross basic blocks. Note that - // taken branches end instruction groups. So we only need to worry about - // 'fallthrough' code - std::set<unsigned> PendingRegWrites; - }; - char IA64BundlingPass::ID = 0; -} // end of anonymous namespace - -/// createIA64BundlingPass - Returns a pass that adds STOP (;;) instructions -/// and arranges the result into bundles. -/// -FunctionPass *llvm::createIA64BundlingPass(IA64TargetMachine &tm) { - return new IA64BundlingPass(tm); -} - -/// runOnMachineBasicBlock - add stops and bundle this MBB. -/// -bool IA64BundlingPass::runOnMachineBasicBlock(MachineBasicBlock &MBB) { - bool Changed = false; - - for (MachineBasicBlock::iterator I = MBB.begin(); I != MBB.end(); ) { - MachineInstr *CurrentInsn = I++; - std::set<unsigned> CurrentReads, CurrentWrites, OrigWrites; - - for(unsigned i=0; i < CurrentInsn->getNumOperands(); i++) { - MachineOperand &MO=CurrentInsn->getOperand(i); - if (MO.isReg()) { - if(MO.isUse()) { // TODO: exclude p0 - CurrentReads.insert(MO.getReg()); - } - if(MO.isDef()) { // TODO: exclude p0 - CurrentWrites.insert(MO.getReg()); - OrigWrites.insert(MO.getReg()); // FIXME: use a nondestructive - // set_intersect instead? - } - } - } - - // CurrentReads/CurrentWrites contain info for the current instruction. - // Does it read or write any registers that are pending a write? - // (i.e. not separated by a stop) - set_intersect(CurrentReads, PendingRegWrites); - set_intersect(CurrentWrites, PendingRegWrites); - - if(! (CurrentReads.empty() && CurrentWrites.empty()) ) { - // there is a conflict, insert a stop and reset PendingRegWrites - CurrentInsn = BuildMI(MBB, CurrentInsn, CurrentInsn->getDebugLoc(), - TM.getInstrInfo()->get(IA64::STOP), 0); - PendingRegWrites=OrigWrites; // carry over current writes to next insn - Changed=true; StopBitsAdded++; // update stats - } else { // otherwise, track additional pending writes - set_union(PendingRegWrites, OrigWrites); - } - } // onto the next insn in the MBB - - return Changed; -} - diff --git a/lib/Target/IA64/IA64ISelDAGToDAG.cpp b/lib/Target/IA64/IA64ISelDAGToDAG.cpp deleted file mode 100644 index fc24241a6c..0000000000 --- a/lib/Target/IA64/IA64ISelDAGToDAG.cpp +++ /dev/null @@ -1,577 +0,0 @@ -//===---- IA64ISelDAGToDAG.cpp - IA64 pattern matching inst selector ------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file defines a pattern matching instruction selector for IA64, -// converting a legalized dag to an IA64 dag. -// -//===----------------------------------------------------------------------===// - -#define DEBUG_TYPE "ia64-codegen" -#include "IA64.h" -#include "IA64TargetMachine.h" -#include "IA64ISelLowering.h" -#include "llvm/CodeGen/MachineInstrBuilder.h" -#include "llvm/CodeGen/MachineFunction.h" -#include "llvm/CodeGen/SelectionDAG.h" -#include "llvm/CodeGen/SelectionDAGISel.h" -#include "llvm/Target/TargetOptions.h" -#include "llvm/Constants.h" -#include "llvm/GlobalValue.h" -#include "llvm/Intrinsics.h" -#include "llvm/Support/Compiler.h" -#include "llvm/Support/Debug.h" -#include "llvm/Support/ErrorHandling.h" -#include "llvm/Support/MathExtras.h" -#include "llvm/Support/raw_ostream.h" -using namespace llvm; - -namespace { - //===--------------------------------------------------------------------===// - /// IA64DAGToDAGISel - IA64 specific code to select IA64 machine - /// instructions for SelectionDAG operations. - /// - class IA64DAGToDAGISel : public SelectionDAGISel { - unsigned GlobalBaseReg; - public: - explicit IA64DAGToDAGISel(IA64TargetMachine &TM) - : SelectionDAGISel(TM) {} - - virtual bool runOnFunction(Function &Fn) { - // Make sure we re-emit a set of the global base reg if necessary - GlobalBaseReg = 0; - return SelectionDAGISel::runOnFunction(Fn); - } - - /// getI64Imm - Return a target constant with the specified value, of type - /// i64. - inline SDValue getI64Imm(uint64_t Imm) { - return CurDAG->getTargetConstant(Imm, MVT::i64); - } - - /// getGlobalBaseReg - insert code into the entry mbb to materialize the PIC - /// base register. Return the virtual register that holds this value. - // SDValue getGlobalBaseReg(); TODO: hmm - - // Select - Convert the specified operand from a target-independent to a - // target-specific node if it hasn't already been changed. - SDNode *Select(SDValue N); - - SDNode *SelectIntImmediateExpr(SDValue LHS, SDValue RHS, - unsigned OCHi, unsigned OCLo, - bool IsArithmetic = false, - bool Negate = false); - SDNode *SelectBitfieldInsert(SDNode *N); - - /// SelectCC - Select a comparison of the specified values with the - /// specified condition code, returning the CR# of the expression. - SDValue SelectCC(SDValue LHS, SDValue RHS, ISD::CondCode CC); - - /// SelectAddr - Given the specified address, return the two operands for a - /// load/store instruction, and return true if it should be an indexed [r+r] - /// operation. - bool SelectAddr(SDValue Addr, SDValue &Op1, SDValue &Op2); - - /// InstructionSelect - This callback is invoked by - /// SelectionDAGISel when it has created a SelectionDAG for us to codegen. - virtual void InstructionSelect(); - - virtual const char *getPassName() const { - return "IA64 (Itanium) DAG->DAG Instruction Selector"; - } - -// Include the pieces autogenerated from the target description. -#include "IA64GenDAGISel.inc" - -private: - SDNode *SelectDIV(SDValue Op); - }; -} - -/// InstructionSelect - This callback is invoked by -/// SelectionDAGISel when it has created a SelectionDAG for us to codegen. -void IA64DAGToDAGISel::InstructionSelect() { |