diff options
Diffstat (limited to 'lib/Target/ARM/ARMFastISel.cpp')
-rw-r--r-- | lib/Target/ARM/ARMFastISel.cpp | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/lib/Target/ARM/ARMFastISel.cpp b/lib/Target/ARM/ARMFastISel.cpp index 3eac44bc8d..675e7e5d25 100644 --- a/lib/Target/ARM/ARMFastISel.cpp +++ b/lib/Target/ARM/ARMFastISel.cpp @@ -805,17 +805,19 @@ bool ARMFastISel::ARMEmitStore(EVT VT, unsigned SrcReg, unsigned Base, int Offset) { unsigned StrOpc; bool isFloat = false; + bool needReg0Op = false; switch (VT.getSimpleVT().SimpleTy) { default: return false; case MVT::i1: case MVT::i8: - StrOpc = isThumb ? ARM::t2STRBi12 : ARM::STRB; + StrOpc = isThumb ? ARM::t2STRBi12 : ARM::STRBi12; break; case MVT::i16: StrOpc = isThumb ? ARM::t2STRHi12 : ARM::STRH; + needReg0Op = true; break; case MVT::i32: - StrOpc = isThumb ? ARM::t2STRi12 : ARM::STR; + StrOpc = isThumb ? ARM::t2STRi12 : ARM::STRi12; break; case MVT::f32: if (!Subtarget->hasVFP2()) return false; @@ -836,9 +838,10 @@ bool ARMFastISel::ARMEmitStore(EVT VT, unsigned SrcReg, if (isFloat) Offset /= 4; - // The thumb addressing mode has operands swapped from the arm addressing - // mode, the floating point one only has two operands. - if (isFloat || isThumb) + + // FIXME: The 'needReg0Op' bit goes away once STRH is converted to + // not use the mega-addrmode stuff. + if (!needReg0Op) AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(StrOpc)) .addReg(SrcReg).addReg(Base).addImm(Offset)); |