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-rw-r--r--lib/CodeGen/SelectionDAG/LegalizeDAG.cpp15
-rw-r--r--lib/CodeGen/SelectionDAG/SelectionDAG.cpp3
-rw-r--r--lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp49
3 files changed, 27 insertions, 40 deletions
diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
index c40a783da0..3d01bb2fa0 100644
--- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
@@ -652,8 +652,7 @@ SDOperand ExpandUnalignedLoad(LoadSDNode *LD, SelectionDAG &DAG,
Result = DAG.getNode(ISD::FP_EXTEND, VT, Result);
SDOperand Ops[] = { Result, Chain };
- return DAG.getNode(ISD::MERGE_VALUES, DAG.getVTList(VT, MVT::Other),
- Ops, 2);
+ return DAG.getMergeValues(DAG.getVTList(VT, MVT::Other), Ops, 2);
}
assert(LoadedVT.isInteger() && !LoadedVT.isVector() &&
"Unaligned load of unsupported type.");
@@ -702,7 +701,7 @@ SDOperand ExpandUnalignedLoad(LoadSDNode *LD, SelectionDAG &DAG,
Hi.getValue(1));
SDOperand Ops[] = { Result, TF };
- return DAG.getNode(ISD::MERGE_VALUES, DAG.getVTList(VT, MVT::Other), Ops, 2);
+ return DAG.getMergeValues(DAG.getVTList(VT, MVT::Other), Ops, 2);
}
/// UnrollVectorOp - We know that the given vector has a legal type, however
@@ -933,8 +932,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
// Fall Thru
case TargetLowering::Legal: {
SDOperand Ops[] = { DAG.getConstant(0, VT), Tmp1 };
- Result = DAG.getNode(ISD::MERGE_VALUES, DAG.getVTList(VT, MVT::Other),
- Ops, 2);
+ Result = DAG.getMergeValues(DAG.getVTList(VT, MVT::Other), Ops, 2);
break;
}
}
@@ -968,8 +966,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
// Fall Thru
case TargetLowering::Legal: {
SDOperand Ops[] = { DAG.getConstant(0, VT), Tmp2 };
- Result = DAG.getNode(ISD::MERGE_VALUES, DAG.getVTList(VT, MVT::Other),
- Ops, 2);
+ Result = DAG.getMergeValues(DAG.getVTList(VT, MVT::Other), Ops, 2);
break;
}
}
@@ -4737,10 +4734,10 @@ void SelectionDAGLegalize::LegalizeSetCCOperands(SDOperand &LHS,
default: assert(0 && "Unsupported FP setcc!");
}
}
-
+
SDOperand Dummy;
Tmp1 = ExpandLibCall(LC1,
- DAG.getNode(ISD::MERGE_VALUES, VT, LHS, RHS).Val,
+ DAG.getNode(ISD::MERGE_VALUES, VT, LHS, RHS).Val,
false /*sign irrelevant*/, Dummy);
Tmp2 = DAG.getConstant(0, MVT::i32);
CC = DAG.getCondCode(TLI.getCmpLibcallCC(LC1));
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 023be5c695..6456fa30e3 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -1983,8 +1983,7 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT, SDOperand Operand) {
unsigned OpOpcode = Operand.Val->getOpcode();
switch (Opcode) {
case ISD::TokenFactor:
- case ISD::MERGE_VALUES:
- return Operand; // Factor or merge of one node? No need.
+ return Operand; // Factor of one node? No need.
case ISD::FP_ROUND: assert(0 && "Invalid method to make FP_ROUND node");
case ISD::FP_EXTEND:
assert(VT.isFloatingPoint() &&
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index 0ab5b6237c..e8537d2011 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -1165,9 +1165,8 @@ SDOperand SelectionDAGLowering::getValue(const Value *V) {
ValueVTs.push_back(Val->getValueType(i));
}
}
- return DAG.getNode(ISD::MERGE_VALUES,
- DAG.getVTList(&ValueVTs[0], ValueVTs.size()),
- &Constants[0], Constants.size());
+ return DAG.getMergeValues(DAG.getVTList(&ValueVTs[0], ValueVTs.size()),
+ &Constants[0], Constants.size());
}
if (const ArrayType *ATy = dyn_cast<ArrayType>(C->getType())) {
@@ -1187,9 +1186,8 @@ SDOperand SelectionDAGLowering::getValue(const Value *V) {
else
Constants[i] = DAG.getConstant(0, EltVT);
}
- return DAG.getNode(ISD::MERGE_VALUES,
- DAG.getVTList(&ValueVTs[0], ValueVTs.size()),
- &Constants[0], Constants.size());
+ return DAG.getMergeValues(DAG.getVTList(&ValueVTs[0], ValueVTs.size()),
+ &Constants[0], Constants.size());
}
if (const StructType *STy = dyn_cast<StructType>(C->getType())) {
@@ -1210,9 +1208,8 @@ SDOperand SelectionDAGLowering::getValue(const Value *V) {
else
Constants[i] = DAG.getConstant(0, EltVT);
}
- return DAG.getNode(ISD::MERGE_VALUES,
- DAG.getVTList(&ValueVTs[0], ValueVTs.size()),
- &Constants[0], Constants.size());
+ return DAG.getMergeValues(DAG.getVTList(&ValueVTs[0], ValueVTs.size()),
+ &Constants[0], Constants.size());
}
const VectorType *VecTy = cast<VectorType>(V->getType());
@@ -2722,9 +2719,8 @@ void SelectionDAGLowering::visitInsertValue(InsertValueInst &I) {
Values[i] = IntoUndef ? DAG.getNode(ISD::UNDEF, AggValueVTs[i]) :
SDOperand(Agg.Val, Agg.ResNo + i);
- setValue(&I, DAG.getNode(ISD::MERGE_VALUES,
- DAG.getVTList(&AggValueVTs[0], NumAggValues),
- &Values[0], NumAggValues));
+ setValue(&I, DAG.getMergeValues(DAG.getVTList(&AggValueVTs[0], NumAggValues),
+ &Values[0], NumAggValues));
}
void SelectionDAGLowering::visitExtractValue(ExtractValueInst &I) {
@@ -2749,9 +2745,8 @@ void SelectionDAGLowering::visitExtractValue(ExtractValueInst &I) {
OutOfUndef ? DAG.getNode(ISD::UNDEF, Agg.Val->getValueType(Agg.ResNo + i)) :
SDOperand(Agg.Val, Agg.ResNo + i);
- setValue(&I, DAG.getNode(ISD::MERGE_VALUES,
- DAG.getVTList(&ValValueVTs[0], NumValValues),
- &Values[0], NumValValues));
+ setValue(&I, DAG.getMergeValues(DAG.getVTList(&ValValueVTs[0], NumValValues),
+ &Values[0], NumValValues));
}
@@ -2906,9 +2901,8 @@ void SelectionDAGLowering::visitLoad(LoadInst &I) {
else
PendingLoads.push_back(Chain);
- setValue(&I, DAG.getNode(ISD::MERGE_VALUES,
- DAG.getVTList(&ValueVTs[0], NumValues),
- &Values[0], NumValues));
+ setValue(&I, DAG.getMergeValues(DAG.getVTList(&ValueVTs[0], NumValues),
+ &Values[0], NumValues));
}
@@ -3796,9 +3790,8 @@ SDOperand RegsForValue::getCopyFromRegs(SelectionDAG &DAG,
if (ValueVTs.size() == 1)
return Values[0];
- return DAG.getNode(ISD::MERGE_VALUES,
- DAG.getVTList(&ValueVTs[0], ValueVTs.size()),
- &Values[0], ValueVTs.size());
+ return DAG.getMergeValues(DAG.getVTList(&ValueVTs[0], ValueVTs.size()),
+ &Values[0], ValueVTs.size());
}
/// getCopyToRegs - Emit a series of CopyToReg nodes that copies the
@@ -4867,10 +4860,8 @@ TargetLowering::LowerCallTo(SDOperand Chain, const Type *RetTy,
AssertOp);
ReturnValues.push_back(ReturnValue);
}
- Res = ReturnValues.size() == 1 ? ReturnValues.front() :
- DAG.getNode(ISD::MERGE_VALUES,
- DAG.getVTList(&RetTys[0], RetTys.size()),
- &ReturnValues[0], ReturnValues.size());
+ Res = DAG.getMergeValues(DAG.getVTList(&RetTys[0], RetTys.size()),
+ &ReturnValues[0], ReturnValues.size());
}
return std::make_pair(Res, Chain);
@@ -4972,10 +4963,10 @@ LowerArguments(BasicBlock *LLVMBB, SelectionDAGLowering &SDL) {
SmallVector<MVT, 4> LegalValueVTs(NumValues);
for (unsigned VI = 0; VI != NumValues; ++VI)
LegalValueVTs[VI] = Args[a + VI].getValueType();
- SDL.setValue(AI, SDL.DAG.getNode(ISD::MERGE_VALUES,
- SDL.DAG.getVTList(&LegalValueVTs[0],
- NumValues),
- &Args[a], NumValues));
+ SDL.setValue(AI,
+ SDL.DAG.getMergeValues(SDL.DAG.getVTList(&LegalValueVTs[0],
+ NumValues),
+ &Args[a], NumValues));
// If this argument is live outside of the entry block, insert a copy from
// whereever we got it to the vreg that other BB's will reference it as.
DenseMap<const Value*, unsigned>::iterator VMI=FuncInfo.ValueMap.find(AI);
generated by cgit v1.2.3-18-g5258 (git 2.32.0) at 2025-07-15 16:57:40 +0000