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-rw-r--r--lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp17
1 files changed, 13 insertions, 4 deletions
diff --git a/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp b/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp
index f654e90100..86a7e7042c 100644
--- a/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp
+++ b/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp
@@ -186,6 +186,12 @@ FixConstantOperandsForInstr(Instruction* vmInstr,
immedValue);
if (opType == MachineOperand::MO_VirtualRegister)
constantThatMustBeLoaded = true;
+ else {
+ // The optype has changed from being a register to an immediate
+ // This means we need to change the opcode, e.g. ADDr -> ADDi
+ unsigned newOpcode = convertOpcodeFromRegToImm(opCode);
+ minstr->setOpcode(newOpcode);
+ }
}
}
else
@@ -203,6 +209,13 @@ FixConstantOperandsForInstr(Instruction* vmInstr,
opCode, target, (immedPos == (int)op),
machineRegNum, immedValue);
+ if (opType == MachineOperand::MO_SignExtendedImmed) {
+ // The optype is an immediate value
+ // This means we need to change the opcode, e.g. ADDr -> ADDi
+ unsigned newOpcode = convertOpcodeFromRegToImm(opCode);
+ minstr->setOpcode(newOpcode);
+ }
+
if (opType == mop.getType())
continue; // no change: this is the most common case
@@ -220,10 +233,6 @@ FixConstantOperandsForInstr(Instruction* vmInstr,
else if (opType == MachineOperand::MO_SignExtendedImmed ||
opType == MachineOperand::MO_UnextendedImmed) {
minstr->SetMachineOperandConst(op, opType, immedValue);
- // The optype has changed from being a register to an immediate
- // This means we need to change the opcode, e.g. ADDr -> ADDi
- unsigned newOpcode = convertOpcodeFromRegToImm(opCode);
- minstr->setOpcode(newOpcode);
} else if (constantThatMustBeLoaded ||
(opValue && isa<GlobalValue>(opValue)))
{ // opValue is a constant that must be explicitly loaded into a reg