diff options
Diffstat (limited to 'lib/CodeGen')
-rw-r--r-- | lib/CodeGen/MachineBasicBlock.cpp | 2 | ||||
-rw-r--r-- | lib/CodeGen/MachineInstr.cpp | 34 | ||||
-rw-r--r-- | lib/CodeGen/SelectionDAG/ScheduleDAG.cpp | 4 | ||||
-rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 3 |
4 files changed, 19 insertions, 24 deletions
diff --git a/lib/CodeGen/MachineBasicBlock.cpp b/lib/CodeGen/MachineBasicBlock.cpp index 201b79e130..8d8e9b7c59 100644 --- a/lib/CodeGen/MachineBasicBlock.cpp +++ b/lib/CodeGen/MachineBasicBlock.cpp @@ -52,7 +52,7 @@ void ilist_traits<MachineBasicBlock>::removeNodeFromList(MachineBasicBlock* N) { MachineInstr* ilist_traits<MachineInstr>::createSentinel() { - MachineInstr* dummy = new MachineInstr(0, 0); + MachineInstr* dummy = new MachineInstr(); LeakDetector::removeGarbageObject(dummy); return dummy; } diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp index 16e235a679..bafdffb6d4 100644 --- a/lib/CodeGen/MachineInstr.cpp +++ b/lib/CodeGen/MachineInstr.cpp @@ -32,14 +32,10 @@ namespace llvm { extern const TargetInstrDescriptor *TargetInstrDescriptors; } -/// MachineInstr ctor - This constructor only does a _reserve_ of the operands, -/// not a resize for them. It is expected that if you use this that you call -/// add* methods below to fill up the operands, instead of the Set methods. -/// Eventually, the "resizing" ctors will be phased out. -/// -MachineInstr::MachineInstr(short opcode, unsigned numOperands) - : Opcode(opcode), NumImplicitOps(0), parent(0) { - Operands.reserve(numOperands); +/// MachineInstr ctor - This constructor creates a dummy MachineInstr with +/// opcode 0 and no operands. +MachineInstr::MachineInstr() + : Opcode(0), NumImplicitOps(0), parent(0) { // Make sure that we get added to a machine basicblock LeakDetector::addGarbageObject(this); } @@ -72,18 +68,18 @@ void MachineInstr::addImplicitDefUseOperands(const TargetInstrDescriptor &TID) { } /// MachineInstr ctor - This constructor create a MachineInstr and add the -/// implicit operands. It reserves space for numOperand operands. -MachineInstr::MachineInstr(const TargetInstrInfo &TII, short opcode, - unsigned numOperands) - : Opcode(opcode), NumImplicitOps(0), parent(0) { - const TargetInstrDescriptor &TID = TII.get(opcode); +/// implicit operands. It reserves space for number of operands specified by +/// TargetInstrDescriptor or the numOperands if it is not zero. (for +/// instructions with variable number of operands). +MachineInstr::MachineInstr(const TargetInstrDescriptor &TID) + : Opcode(TID.Opcode), NumImplicitOps(0), parent(0) { if (TID.ImplicitDefs) for (const unsigned *ImpDefs = TID.ImplicitDefs; *ImpDefs; ++ImpDefs) NumImplicitOps++; if (TID.ImplicitUses) for (const unsigned *ImpUses = TID.ImplicitUses; *ImpUses; ++ImpUses) NumImplicitOps++; - Operands.reserve(NumImplicitOps + numOperands); + Operands.reserve(NumImplicitOps + TID.numOperands); addImplicitDefUseOperands(TID); // Make sure that we get added to a machine basicblock LeakDetector::addGarbageObject(this); @@ -92,19 +88,17 @@ MachineInstr::MachineInstr(const TargetInstrInfo &TII, short opcode, /// MachineInstr ctor - Work exactly the same as the ctor above, except that the /// MachineInstr is created and added to the end of the specified basic block. /// -MachineInstr::MachineInstr(MachineBasicBlock *MBB, short opcode, - unsigned numOperands) - : Opcode(opcode), NumImplicitOps(0), parent(0) { +MachineInstr::MachineInstr(MachineBasicBlock *MBB, + const TargetInstrDescriptor &TID) + : Opcode(TID.Opcode), NumImplicitOps(0), parent(0) { assert(MBB && "Cannot use inserting ctor with null basic block!"); - const TargetInstrDescriptor &TID = MBB->getParent()->getTarget(). - getInstrInfo()->get(opcode); if (TID.ImplicitDefs) for (const unsigned *ImpDefs = TID.ImplicitDefs; *ImpDefs; ++ImpDefs) NumImplicitOps++; if (TID.ImplicitUses) for (const unsigned *ImpUses = TID.ImplicitUses; *ImpUses; ++ImpUses) NumImplicitOps++; - Operands.reserve(NumImplicitOps + numOperands); + Operands.reserve(NumImplicitOps + TID.numOperands); addImplicitDefUseOperands(TID); // Make sure that we get added to a machine basicblock LeakDetector::addGarbageObject(this); diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp index 5330306c2a..e72cdc6b82 100644 --- a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp +++ b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp @@ -395,7 +395,7 @@ void ScheduleDAG::EmitNode(SDNode *Node, #endif // Create the new machine instruction. - MachineInstr *MI = new MachineInstr(*TII, Opc, NumMIOperands); + MachineInstr *MI = new MachineInstr(II); // Add result register values for things that are defined by this // instruction. @@ -518,7 +518,7 @@ void ScheduleDAG::EmitNode(SDNode *Node, // Create the inline asm machine instruction. MachineInstr *MI = - new MachineInstr(BB, TargetInstrInfo::INLINEASM, (NumOps-2)/2+1); + new MachineInstr(BB, TII->get(TargetInstrInfo::INLINEASM)); // Add the asm string as an external symbol operand. const char *AsmStr = diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index c18b5bc274..0257e1b775 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -294,8 +294,9 @@ FunctionLoweringInfo::FunctionLoweringInfo(TargetLowering &tli, } unsigned PHIReg = ValueMap[PN]; assert(PHIReg && "PHI node does not have an assigned virtual register!"); + const TargetInstrInfo *TII = TLI.getTargetMachine().getInstrInfo(); for (unsigned i = 0; i != NumElements; ++i) - BuildMI(MBB, TargetInstrInfo::PHI, PN->getNumOperands(), PHIReg+i); + BuildMI(MBB, TII->get(TargetInstrInfo::PHI), PHIReg+i); } } } |