5 files changed, 12 insertions, 6 deletions
diff --git a/lib/CodeGen/PHIElimination.cpp b/lib/CodeGen/PHIElimination.cpp
index 58ab82e032..5b8798f982 100644
--- a/lib/CodeGen/PHIElimination.cpp
+++ b/lib/CodeGen/PHIElimination.cpp
@@ -23,6 +23,7 @@
 #include "llvm/ADT/DenseMap.h"
 #include "llvm/ADT/STLExtras.h"
 #include "llvm/ADT/Statistic.h"
+#include "llvm/Support/Visibility.h"
 #include <set>
 #include <algorithm>
 using namespace llvm;
@@ -31,7 +32,7 @@ namespace {
   Statistic<> NumAtomic("phielim", "Number of atomic phis lowered");
   Statistic<> NumSimple("phielim", "Number of simple phis lowered");
   
-  struct PNE : public MachineFunctionPass {
+  struct VISIBILITY_HIDDEN PNE : public MachineFunctionPass {
     bool runOnMachineFunction(MachineFunction &Fn) {
       bool Changed = false;
 
diff --git a/lib/CodeGen/RegAllocLocal.cpp b/lib/CodeGen/RegAllocLocal.cpp
index 55d412960c..891ee3c0f3 100644
--- a/lib/CodeGen/RegAllocLocal.cpp
+++ b/lib/CodeGen/RegAllocLocal.cpp
@@ -23,6 +23,7 @@
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Support/CommandLine.h"
 #include "llvm/Support/Debug.h"
+#include "llvm/Support/Visibility.h"
 #include "llvm/ADT/DenseMap.h"
 #include "llvm/ADT/Statistic.h"
 #include <algorithm>
@@ -34,7 +35,7 @@ namespace {
   Statistic<> NumLoads ("ra-local", "Number of loads added");
   Statistic<> NumFolded("ra-local", "Number of loads/stores folded into "
                         "instructions");
-  class RA : public MachineFunctionPass {
+  class VISIBILITY_HIDDEN RA : public MachineFunctionPass {
     const TargetMachine *TM;
     MachineFunction *MF;
     const MRegisterInfo *RegInfo;
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
index 0ef246b8eb..b6c2d352b3 100644
--- a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
+++ b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
@@ -430,7 +430,8 @@ namespace {
 
 namespace {
   template<class SF>
-  class RegReductionPriorityQueue : public SchedulingPriorityQueue {
+  class VISIBILITY_HIDDEN RegReductionPriorityQueue
+   : public SchedulingPriorityQueue {
     std::priority_queue<SUnit*, std::vector<SUnit*>, SF> Queue;
 
   public:
@@ -463,7 +464,8 @@ namespace {
   };
 
   template<class SF>
-  class BURegReductionPriorityQueue : public RegReductionPriorityQueue<SF> {
+  class VISIBILITY_HIDDEN BURegReductionPriorityQueue
+   : public RegReductionPriorityQueue<SF> {
     // SUnits - The SUnits for the current graph.
     const std::vector<SUnit> *SUnits;
     
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index c7e4315bbd..3968c38fa4 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -42,6 +42,7 @@
 #include "llvm/Support/CommandLine.h"
 #include "llvm/Support/MathExtras.h"
 #include "llvm/Support/Debug.h"
+#include "llvm/Support/Visibility.h"
 #include <map>
 #include <set>
 #include <iostream>
@@ -101,7 +102,7 @@ namespace {
   /// particular value is assigned and the type information about the value.
   /// This is needed because values can be promoted into larger registers and
   /// expanded into multiple smaller registers than the value.
-  struct RegsForValue {
+  struct VISIBILITY_HIDDEN RegsForValue {
     /// Regs - This list hold the register (for legal and promoted values)
     /// or register set (for expanded values) that the value should be assigned
     /// to.
diff --git a/lib/CodeGen/UnreachableBlockElim.cpp b/lib/CodeGen/UnreachableBlockElim.cpp
index 1d4e5304f3..e4fc9f8148 100644
--- a/lib/CodeGen/UnreachableBlockElim.cpp
+++ b/lib/CodeGen/UnreachableBlockElim.cpp
@@ -27,11 +27,12 @@
 #include "llvm/Pass.h"
 #include "llvm/Type.h"
 #include "llvm/Support/CFG.h"
+#include "llvm/Support/Visibility.h"
 #include "llvm/ADT/DepthFirstIterator.h"
 using namespace llvm;
 
 namespace {
-  class UnreachableBlockElim : public FunctionPass {
+  class VISIBILITY_HIDDEN UnreachableBlockElim : public FunctionPass {
     virtual bool runOnFunction(Function &F);
   };
   RegisterOpt<UnreachableBlockElim>