diff options
Diffstat (limited to 'lib/CodeGen')
| -rw-r--r-- | lib/CodeGen/LiveIntervalAnalysis.cpp | 8 | ||||
| -rw-r--r-- | lib/CodeGen/RegAllocLinearScan.cpp | 4 |
2 files changed, 6 insertions, 6 deletions
diff --git a/lib/CodeGen/LiveIntervalAnalysis.cpp b/lib/CodeGen/LiveIntervalAnalysis.cpp index ec2470a04a..8b534af74b 100644 --- a/lib/CodeGen/LiveIntervalAnalysis.cpp +++ b/lib/CodeGen/LiveIntervalAnalysis.cpp @@ -219,7 +219,7 @@ bool LiveIntervals::runOnMachineFunction(MachineFunction &fn) { // range the use follows def immediately, it doesn't make sense to spill // it and hope it will be easier to allocate for this li. if (isZeroLengthInterval(&LI)) - LI.weight = float(HUGE_VAL); + LI.weight = HUGE_VALF; if (EnableReweight) { // Divide the weight of the interval by its size. This encourages @@ -265,7 +265,7 @@ addIntervalsForSpills(const LiveInterval &li, VirtRegMap &vrm, int slot) { std::vector<LiveInterval*> added; - assert(li.weight != HUGE_VAL && + assert(li.weight != HUGE_VALF && "attempt to spill already spilled interval!"); DEBUG(std::cerr << "\t\t\t\tadding intervals for spills for interval: "; @@ -340,7 +340,7 @@ addIntervalsForSpills(const LiveInterval &li, VirtRegMap &vrm, int slot) { // the spill weight is now infinity as it // cannot be spilled again - nI.weight = float(HUGE_VAL); + nI.weight = HUGE_VALF; if (HasUse) { LiveRange LR(getLoadIndex(index), getUseIndex(index), @@ -1362,6 +1362,6 @@ bool LiveIntervals::differingRegisterClasses(unsigned RegA, LiveInterval LiveIntervals::createInterval(unsigned reg) { float Weight = MRegisterInfo::isPhysicalRegister(reg) ? - (float)HUGE_VAL : 0.0F; + HUGE_VALF : 0.0F; return LiveInterval(reg, Weight); } diff --git a/lib/CodeGen/RegAllocLinearScan.cpp b/lib/CodeGen/RegAllocLinearScan.cpp index d8d838d34f..2aea512b16 100644 --- a/lib/CodeGen/RegAllocLinearScan.cpp +++ b/lib/CodeGen/RegAllocLinearScan.cpp @@ -545,7 +545,7 @@ void RA::assignRegOrStackSlotAtInterval(LiveInterval* cur) DEBUG(std::cerr << "\tassigning stack slot at interval "<< *cur << ":\n"); // Find a register to spill. - float minWeight = float(HUGE_VAL); + float minWeight = HUGE_VALF; unsigned minReg = 0; for (TargetRegisterClass::iterator i = RC->allocation_order_begin(*mf_), e = RC->allocation_order_end(*mf_); i != e; ++i) { @@ -582,7 +582,7 @@ void RA::assignRegOrStackSlotAtInterval(LiveInterval* cur) // if the current has the minimum weight, we need to spill it and // add any added intervals back to unhandled, and restart // linearscan. - if (cur->weight != float(HUGE_VAL) && cur->weight <= minWeight) { + if (cur->weight != HUGE_VALF && cur->weight <= minWeight) { DEBUG(std::cerr << "\t\t\tspilling(c): " << *cur << '\n';); int slot = vrm_->assignVirt2StackSlot(cur->reg); std::vector<LiveInterval*> added = |