2 files changed, 7 insertions, 7 deletions
diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
index 7b148f1158..0bd40c2934 100644
--- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
@@ -3056,7 +3056,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
         // new ones, as reuse may inhibit scheduling.
         const Type *Ty = MVT::getTypeForValueType(ExtraVT);
         unsigned TySize = (unsigned)TLI.getTargetData()->getTypeSize(Ty);
-        unsigned Align  = TLI.getTargetData()->getTypeAlignmentPref(Ty);
+        unsigned Align  = TLI.getTargetData()->getPrefTypeAlignment(Ty);
         MachineFunction &MF = DAG.getMachineFunction();
         int SSFI =
           MF.getFrameInfo()->CreateStackObject((unsigned)TySize, Align);
@@ -3979,7 +3979,7 @@ SDOperand SelectionDAGLegalize::CreateStackTemporary(MVT::ValueType VT) {
   MachineFrameInfo *FrameInfo = DAG.getMachineFunction().getFrameInfo();
   unsigned ByteSize = MVT::getSizeInBits(VT)/8;
   const Type *Ty = MVT::getTypeForValueType(VT);
-  unsigned StackAlign = (unsigned)TLI.getTargetData()->getTypeAlignmentPref(Ty);
+  unsigned StackAlign = (unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty);
   int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign);
   return DAG.getFrameIndex(FrameIdx, TLI.getPointerTy());
 }
@@ -4289,7 +4289,7 @@ SDOperand SelectionDAGLegalize::ExpandLegalINT_TO_FP(bool isSigned,
     MachineFunction &MF = DAG.getMachineFunction();
     const Type *F64Type = MVT::getTypeForValueType(MVT::f64);
     unsigned StackAlign =
-      (unsigned)TLI.getTargetData()->getTypeAlignmentPref(F64Type);
+      (unsigned)TLI.getTargetData()->getPrefTypeAlignment(F64Type);
     int SSFI = MF.getFrameInfo()->CreateStackObject(8, StackAlign);
     // get address of 8 byte buffer
     SDOperand StackSlot = DAG.getFrameIndex(SSFI, TLI.getPointerTy());
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index e2bda6d4c4..e72d88c734 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -244,7 +244,7 @@ FunctionLoweringInfo::FunctionLoweringInfo(TargetLowering &tli,
         const Type *Ty = AI->getAllocatedType();
         uint64_t TySize = TLI.getTargetData()->getTypeSize(Ty);
         unsigned Align = 
-          std::max((unsigned)TLI.getTargetData()->getTypeAlignmentPref(Ty),
+          std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty),
                    AI->getAlignment());
 
         TySize *= CUI->getZExtValue();   // Get total allocated size.
@@ -1733,7 +1733,7 @@ void SelectionDAGLowering::visitAlloca(AllocaInst &I) {
   const Type *Ty = I.getAllocatedType();
   uint64_t TySize = TLI.getTargetData()->getTypeSize(Ty);
   unsigned Align =
-    std::max((unsigned)TLI.getTargetData()->getTypeAlignmentPref(Ty),
+    std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty),
              I.getAlignment());
 
   SDOperand AllocSize = getValue(I.getArraySize());
@@ -2934,7 +2934,7 @@ TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) {
     bool isInReg = FTy->paramHasAttr(j, FunctionType::InRegAttribute);
     bool isSRet  = FTy->paramHasAttr(j, FunctionType::StructRetAttribute);
     unsigned OriginalAlignment =
-      getTargetData()->getTypeAlignmentABI(I->getType());
+      getTargetData()->getABITypeAlignment(I->getType());
     // Flags[31:27] -> OriginalAlignment
     // Flags[2] -> isSRet
     // Flags[1] -> isInReg
@@ -3120,7 +3120,7 @@ TargetLowering::LowerCallTo(SDOperand Chain, const Type *RetTy,
     bool isInReg = Args[i].isInReg;
     bool isSRet  = Args[i].isSRet;
     unsigned OriginalAlignment =
-      getTargetData()->getTypeAlignmentABI(Args[i].Ty);
+      getTargetData()->getABITypeAlignment(Args[i].Ty);
     // Flags[31:27] -> OriginalAlignment
     // Flags[2] -> isSRet
     // Flags[1] -> isInReg