1 files changed, 3 insertions, 25 deletions

diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
index 3873c33a20..aad1f87ed9 100644
--- a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
@@ -277,27 +277,15 @@ unsigned ScheduleDAG::CountResults(SDNode *Node) {
   return N;
 }
 
-/// CountOperands - The inputs to target nodes have any actual inputs first,
-/// followed by optional memory operands chain operand, then flag operands.
-/// Compute the number of actual operands that  will go into the machine istr.
+/// CountOperands  The inputs to target nodes have any actual inputs first,
+/// followed by an optional chain operand, then flag operands.  Compute the
+/// number of actual operands that  will go into the machine instr.
 unsigned ScheduleDAG::CountOperands(SDNode *Node) {
   unsigned N = Node->getNumOperands();
   while (N && Node->getOperand(N - 1).getValueType() == MVT::Flag)
     --N;
   if (N && Node->getOperand(N - 1).getValueType() == MVT::Other)
     --N; // Ignore chain if it exists.
-  while (N && MemOperandSDNode::classof(Node->getOperand(N - 1).Val))
-    --N; // Ignore MemOperand nodes
-  return N;
-}
-
-/// CountMemOperands - Find the index of the last MemOperandSDNode operand
-unsigned ScheduleDAG::CountMemOperands(SDNode *Node) {
-  unsigned N = Node->getNumOperands();
-  while (N && Node->getOperand(N - 1).getValueType() == MVT::Flag)
-    --N;
-  if (N && Node->getOperand(N - 1).getValueType() == MVT::Other)
-    --N; // Ignore chain if it exists.
   return N;
 }
 
@@ -529,10 +517,6 @@ void ScheduleDAG::AddOperand(MachineInstr *MI, SDOperand Op,
   
 }
 
-void ScheduleDAG::AddMemOperand(MachineInstr *MI, const MemOperand &MO) {
-  MI->addMemOperand(MO);
-}
-
 // Returns the Register Class of a subregister
 static const TargetRegisterClass *getSubRegisterRegClass(
         const TargetRegisterClass *TRC,
@@ -691,7 +675,6 @@ void ScheduleDAG::EmitNode(SDNode *Node, unsigned InstanceNo,
 
     unsigned NumResults = CountResults(Node);
     unsigned NodeOperands = CountOperands(Node);
-    unsigned NodeMemOperands = CountMemOperands(Node);
     unsigned NumMIOperands = NodeOperands + NumResults;
     bool HasPhysRegOuts = (NumResults > II.getNumDefs()) &&
                           II.getImplicitDefs() != 0;
@@ -714,10 +697,6 @@ void ScheduleDAG::EmitNode(SDNode *Node, unsigned InstanceNo,
     for (unsigned i = 0; i != NodeOperands; ++i)
       AddOperand(MI, Node->getOperand(i), i+II.getNumDefs(), &II, VRBaseMap);
 
-    // Emit all of the memory operands of this instruction
-    for (unsigned i = NodeOperands; i != NodeMemOperands; ++i)
-      AddMemOperand(MI, cast<MemOperandSDNode>(Node->getOperand(i))->MO);
-
     // Commute node if it has been determined to be profitable.
     if (CommuteSet.count(Node)) {
       MachineInstr *NewMI = TII->commuteInstruction(MI);
@@ -778,7 +757,6 @@ void ScheduleDAG::EmitNode(SDNode *Node, unsigned InstanceNo,
     case ISD::EntryToken: // fall thru
     case ISD::TokenFactor:
     case ISD::LABEL:
-    case ISD::SRCVALUE:
       break;
     case ISD::CopyToReg: {
       unsigned InReg;