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-rw-r--r--lib/Target/ARM/ARMBaseInstrInfo.h2
-rw-r--r--lib/Target/ARM/ARMBaseRegisterInfo.cpp2
-rw-r--r--lib/Target/ARM/ARMInstrInfo.cpp2
-rw-r--r--lib/Target/ARM/Thumb1InstrInfo.cpp2
-rw-r--r--lib/Target/ARM/Thumb2InstrInfo.cpp2
5 files changed, 1 insertions, 9 deletions
diff --git a/lib/Target/ARM/ARMBaseInstrInfo.h b/lib/Target/ARM/ARMBaseInstrInfo.h
index e91d1ebf0e..52f55a88b6 100644
--- a/lib/Target/ARM/ARMBaseInstrInfo.h
+++ b/lib/Target/ARM/ARMBaseInstrInfo.h
@@ -165,9 +165,7 @@ namespace ARMII {
ADDri,
ADDrs,
ADDrr,
- LDRri,
MOVr,
- STRri,
SUBri,
SUBrs,
SUBrr
diff --git a/lib/Target/ARM/ARMBaseRegisterInfo.cpp b/lib/Target/ARM/ARMBaseRegisterInfo.cpp
index 6ef1fff8d8..dfad80b56e 100644
--- a/lib/Target/ARM/ARMBaseRegisterInfo.cpp
+++ b/lib/Target/ARM/ARMBaseRegisterInfo.cpp
@@ -1368,7 +1368,7 @@ static bool isCSRestore(MachineInstr *MI,
void ARMBaseRegisterInfo::
emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const {
- assert(!STI.isThumb1Only &&
+ assert(!STI.isThumb1Only() &&
"This emitEpilogue should not be executed for Thumb1!");
MachineBasicBlock::iterator MBBI = prior(MBB.end());
diff --git a/lib/Target/ARM/ARMInstrInfo.cpp b/lib/Target/ARM/ARMInstrInfo.cpp
index fda9fc23eb..e5eb7bc899 100644
--- a/lib/Target/ARM/ARMInstrInfo.cpp
+++ b/lib/Target/ARM/ARMInstrInfo.cpp
@@ -68,9 +68,7 @@ getOpcode(ARMII::Op Op) const {
case ARMII::ADDri: return ARM::ADDri;
case ARMII::ADDrs: return ARM::ADDrs;
case ARMII::ADDrr: return ARM::ADDrr;
- case ARMII::LDRri: return 0;
case ARMII::MOVr: return ARM::MOVr;
- case ARMII::STRri: return 0;
case ARMII::SUBri: return ARM::SUBri;
case ARMII::SUBrs: return ARM::SUBrs;
case ARMII::SUBrr: return ARM::SUBrr;
diff --git a/lib/Target/ARM/Thumb1InstrInfo.cpp b/lib/Target/ARM/Thumb1InstrInfo.cpp
index a4e8e9ce70..43381a3152 100644
--- a/lib/Target/ARM/Thumb1InstrInfo.cpp
+++ b/lib/Target/ARM/Thumb1InstrInfo.cpp
@@ -35,9 +35,7 @@ unsigned Thumb1InstrInfo::getOpcode(ARMII::Op Op) const {
case ARMII::ADDri: return ARM::tADDi8;
case ARMII::ADDrs: return 0;
case ARMII::ADDrr: return ARM::tADDrr;
- case ARMII::LDRri: return 0;
case ARMII::MOVr: return ARM::tMOVr;
- case ARMII::STRri: return 0;
case ARMII::SUBri: return ARM::tSUBi8;
case ARMII::SUBrs: return 0;
case ARMII::SUBrr: return ARM::tSUBrr;
diff --git a/lib/Target/ARM/Thumb2InstrInfo.cpp b/lib/Target/ARM/Thumb2InstrInfo.cpp
index 45eb29cbb3..acb82320df 100644
--- a/lib/Target/ARM/Thumb2InstrInfo.cpp
+++ b/lib/Target/ARM/Thumb2InstrInfo.cpp
@@ -36,9 +36,7 @@ unsigned Thumb2InstrInfo::getOpcode(ARMII::Op Op) const {
case ARMII::ADDri: return ARM::t2ADDri;
case ARMII::ADDrs: return ARM::t2ADDrs;
case ARMII::ADDrr: return ARM::t2ADDrr;
- case ARMII::LDRri: return ARM::t2LDRi12;
case ARMII::MOVr: return ARM::t2MOVr;
- case ARMII::STRri: return ARM::t2STRi12;
case ARMII::SUBri: return ARM::t2SUBri;
case ARMII::SUBrs: return ARM::t2SUBrs;
case ARMII::SUBrr: return ARM::t2SUBrr;